X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FX86%2FX86TargetMachine.cpp;h=a20e1c448968c3cf2d0ae7460e57fca98e9c48b7;hb=92722533819ab838d958966d0e40a60030bb3c16;hp=ef4f897f5d12f101f07c0afa12899a79340aa3fd;hpb=6520e20e4fb31f2e65e25c38b372b19d33a83df4;p=oota-llvm.git

diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp
index ef4f897f5d1..a20e1c44896 100644
--- a/lib/Target/X86/X86TargetMachine.cpp
+++ b/lib/Target/X86/X86TargetMachine.cpp
@@ -162,17 +162,17 @@ X86TargetMachine::X86TargetMachine(const Module &M, const std::string &FS,
   }
 
   if (Subtarget.isTargetCygMing())
-    Subtarget.setPICStyle(PICStyle::WinPIC);
+    Subtarget.setPICStyle(PICStyles::WinPIC);
   else if (Subtarget.isTargetDarwin()) {
     if (Subtarget.is64Bit())
-      Subtarget.setPICStyle(PICStyle::RIPRel);
+      Subtarget.setPICStyle(PICStyles::RIPRel);
     else
-      Subtarget.setPICStyle(PICStyle::Stub);
+      Subtarget.setPICStyle(PICStyles::Stub);
   } else if (Subtarget.isTargetELF()) {
     if (Subtarget.is64Bit())
-      Subtarget.setPICStyle(PICStyle::RIPRel);
+      Subtarget.setPICStyle(PICStyles::RIPRel);
     else
-      Subtarget.setPICStyle(PICStyle::GOT);
+      Subtarget.setPICStyle(PICStyles::GOT);
   }
 }
 
@@ -183,6 +183,14 @@ X86TargetMachine::X86TargetMachine(const Module &M, const std::string &FS,
 bool X86TargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
   // Install an instruction selector.
   PM.add(createX86ISelDag(*this, Fast));
+
+  // If we're using Fast-ISel, clean up the mess.
+  if (EnableFastISel)
+    PM.add(createDeadMachineInstructionElimPass());
+
+  // Install a pass to insert x87 FP_REG_KILL instructions, as needed.
+  PM.add(createX87FPRegKillInserterPass());
+
   return false;
 }
 
@@ -199,10 +207,10 @@ bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM, bool Fast) {
 }
 
 bool X86TargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast, 
-                                          raw_ostream &Out) {
+                                          bool Verbose, raw_ostream &Out) {
   assert(AsmPrinterCtor && "AsmPrinter was not linked in");
   if (AsmPrinterCtor)
-    PM.add(AsmPrinterCtor(Out, *this));
+    PM.add(AsmPrinterCtor(Out, *this, Fast, Verbose));
   return false;
 }
 
@@ -228,7 +236,7 @@ bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
   if (DumpAsm) {
     assert(AsmPrinterCtor && "AsmPrinter was not linked in");
     if (AsmPrinterCtor)
-      PM.add(AsmPrinterCtor(errs(), *this));
+      PM.add(AsmPrinterCtor(errs(), *this, Fast, true));
   }
 
   return false;
@@ -240,16 +248,16 @@ bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
   if (DumpAsm) {
     assert(AsmPrinterCtor && "AsmPrinter was not linked in");
     if (AsmPrinterCtor)
-      PM.add(AsmPrinterCtor(errs(), *this));
+      PM.add(AsmPrinterCtor(errs(), *this, Fast, true));
   }
 
   return false;
 }
 
-// symbolicAddressesAreRIPRel - Return true if symbolic addresses are
-// RIP-relative on this machine, taking into consideration the relocation
-// model and subtarget. RIP-relative addresses cannot have a separate
-// base or index register.
+/// symbolicAddressesAreRIPRel - Return true if symbolic addresses are
+/// RIP-relative on this machine, taking into consideration the relocation
+/// model and subtarget. RIP-relative addresses cannot have a separate
+/// base or index register.
 bool X86TargetMachine::symbolicAddressesAreRIPRel() const {
   return getRelocationModel() != Reloc::Static &&
          Subtarget.isPICStyleRIPRel();