X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FXCore%2FCMakeLists.txt;h=0a609ef76f4417764350ad26a1c3703f4094dd4f;hb=16d4cc83c30485f28bb37715930c4302749d23b1;hp=dad4f92d749780a845b754a8d1bc7ecd88e75c63;hpb=f682f3d019794d4402b73701a06a4bb117f5d5e7;p=oota-llvm.git diff --git a/lib/Target/XCore/CMakeLists.txt b/lib/Target/XCore/CMakeLists.txt index dad4f92d749..0a609ef76f4 100644 --- a/lib/Target/XCore/CMakeLists.txt +++ b/lib/Target/XCore/CMakeLists.txt @@ -1,24 +1,32 @@ set(LLVM_TARGET_DEFINITIONS XCore.td) -tablegen(XCoreGenRegisterInfo.h.inc -gen-register-desc-header) -tablegen(XCoreGenRegisterNames.inc -gen-register-enums) -tablegen(XCoreGenRegisterInfo.inc -gen-register-desc) -tablegen(XCoreGenInstrNames.inc -gen-instr-enums) -tablegen(XCoreGenInstrInfo.inc -gen-instr-desc) -tablegen(XCoreGenAsmWriter.inc -gen-asm-writer) -tablegen(XCoreGenDAGISel.inc -gen-dag-isel) -tablegen(XCoreGenCallingConv.inc -gen-callingconv) -tablegen(XCoreGenSubtarget.inc -gen-subtarget) +tablegen(LLVM XCoreGenRegisterInfo.inc -gen-register-info) +tablegen(LLVM XCoreGenInstrInfo.inc -gen-instr-info) +tablegen(LLVM XCoreGenDisassemblerTables.inc -gen-disassembler) +tablegen(LLVM XCoreGenAsmWriter.inc -gen-asm-writer) +tablegen(LLVM XCoreGenDAGISel.inc -gen-dag-isel) +tablegen(LLVM XCoreGenCallingConv.inc -gen-callingconv) +tablegen(LLVM XCoreGenSubtargetInfo.inc -gen-subtarget) +add_public_tablegen_target(XCoreCommonTableGen) -add_llvm_target(XCore - MCSectionXCore.cpp - XCoreFrameInfo.cpp +add_llvm_target(XCoreCodeGen + XCoreAsmPrinter.cpp + XCoreFrameLowering.cpp XCoreInstrInfo.cpp XCoreISelDAGToDAG.cpp XCoreISelLowering.cpp + XCoreLowerThreadLocal.cpp + XCoreMachineFunctionInfo.cpp + XCoreMCInstLower.cpp XCoreRegisterInfo.cpp XCoreSubtarget.cpp - XCoreMCAsmInfo.cpp XCoreTargetMachine.cpp XCoreTargetObjectFile.cpp + XCoreSelectionDAGInfo.cpp + XCoreFrameToArgsOffsetElim.cpp ) + +add_subdirectory(Disassembler) +add_subdirectory(InstPrinter) +add_subdirectory(TargetInfo) +add_subdirectory(MCTargetDesc)