X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FTarget%2FXCore%2FXCoreRegisterInfo.cpp;h=f82e59814e7753d14782dadfe45dcc118bca2312;hb=5d42c567c901508e80ab10ddba1bb30a5007d742;hp=5293c82f1341498041164cb663b5c39a03a6fba9;hpb=b25baef26f03b9909b65dd5f762b38f93000445d;p=oota-llvm.git diff --git a/lib/Target/XCore/XCoreRegisterInfo.cpp b/lib/Target/XCore/XCoreRegisterInfo.cpp index 5293c82f134..f82e59814e7 100644 --- a/lib/Target/XCore/XCoreRegisterInfo.cpp +++ b/lib/Target/XCore/XCoreRegisterInfo.cpp @@ -30,6 +30,8 @@ #include "llvm/ADT/BitVector.h" #include "llvm/ADT/STLExtras.h" #include "llvm/Support/Debug.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/raw_ostream.h" using namespace llvm; @@ -65,12 +67,8 @@ unsigned XCoreRegisterInfo::getNumArgRegs(const MachineFunction *MF) return array_lengthof(XCore_ArgRegs); } -bool XCoreRegisterInfo::needsFrameMoves(const MachineFunction &MF) -{ - const MachineFrameInfo *MFI = MF.getFrameInfo(); - MachineModuleInfo *MMI = MFI->getMachineModuleInfo(); - return (MMI && MMI->hasDebugInfo()) || - !MF.getFunction()->doesNotThrow() || +bool XCoreRegisterInfo::needsFrameMoves(const MachineFunction &MF) { + return MF.getMMI().hasDebugInfo() || !MF.getFunction()->doesNotThrow() || UnwindTablesMandatory; } @@ -84,18 +82,6 @@ const unsigned* XCoreRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) return CalleeSavedRegs; } -const TargetRegisterClass* const* -XCoreRegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const { - static const TargetRegisterClass * const CalleeSavedRegClasses[] = { - XCore::GRRegsRegisterClass, XCore::GRRegsRegisterClass, - XCore::GRRegsRegisterClass, XCore::GRRegsRegisterClass, - XCore::GRRegsRegisterClass, XCore::GRRegsRegisterClass, - XCore::GRRegsRegisterClass, XCore::RRegsRegisterClass, - 0 - }; - return CalleeSavedRegClasses; -} - BitVector XCoreRegisterInfo::getReservedRegs(const MachineFunction &MF) const { BitVector Reserved(getNumRegs()); Reserved.set(XCore::CP); @@ -115,7 +101,7 @@ XCoreRegisterInfo::requiresRegisterScavenging(const MachineFunction &MF) const { } bool XCoreRegisterInfo::hasFP(const MachineFunction &MF) const { - return NoFramePointerElim || MF.getFrameInfo()->hasVarSizedObjects(); + return DisableFramePointerElim(MF) || MF.getFrameInfo()->hasVarSizedObjects(); } // This function eliminates ADJCALLSTACKDOWN, @@ -142,20 +128,22 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, if (!isU6 && !isImmU16(Amount)) { // FIX could emit multiple instructions in this case. - cerr << "eliminateCallFramePseudoInstr size too big: " - << Amount << "\n"; - abort(); +#ifndef NDEBUG + errs() << "eliminateCallFramePseudoInstr size too big: " + << Amount << "\n"; +#endif + llvm_unreachable(0); } MachineInstr *New; if (Old->getOpcode() == XCore::ADJCALLSTACKDOWN) { int Opcode = isU6 ? XCore::EXTSP_u6 : XCore::EXTSP_lu6; - New=BuildMI(MF, TII.get(Opcode)) + New=BuildMI(MF, Old->getDebugLoc(), TII.get(Opcode)) .addImm(Amount); } else { assert(Old->getOpcode() == XCore::ADJCALLSTACKUP); int Opcode = isU6 ? XCore::LDAWSP_ru6_RRegs : XCore::LDAWSP_lru6_RRegs; - New=BuildMI(MF, TII.get(Opcode), XCore::SP) + New=BuildMI(MF, Old->getDebugLoc(), TII.get(Opcode), XCore::SP) .addImm(Amount); } @@ -167,10 +155,12 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MBB.erase(I); } -void XCoreRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, - int SPAdj, RegScavenger *RS) const { +void +XCoreRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, + int SPAdj, RegScavenger *RS) const { assert(SPAdj == 0 && "Unexpected"); MachineInstr &MI = *II; + DebugLoc dl = MI.getDebugLoc(); unsigned i = 0; while (!MI.getOperand(i).isFI()) { @@ -186,12 +176,13 @@ void XCoreRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, int StackSize = MF.getFrameInfo()->getStackSize(); #ifndef NDEBUG - DOUT << "\nFunction : " << MF.getFunction()->getName() << "\n"; - DOUT << "<--------->\n"; - MI.print(DOUT); - DOUT << "FrameIndex : " << FrameIndex << "\n"; - DOUT << "FrameOffset : " << Offset << "\n"; - DOUT << "StackSize : " << StackSize << "\n"; + DEBUG(errs() << "\nFunction : " + << MF.getFunction()->getName() << "\n"); + DEBUG(errs() << "<--------->\n"); + DEBUG(MI.print(errs())); + DEBUG(errs() << "FrameIndex : " << FrameIndex << "\n"); + DEBUG(errs() << "FrameOffset : " << Offset << "\n"); + DEBUG(errs() << "StackSize : " << StackSize << "\n"); #endif Offset += StackSize; @@ -202,109 +193,103 @@ void XCoreRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, assert(Offset%4 == 0 && "Misaligned stack offset"); - #ifndef NDEBUG - DOUT << "Offset : " << Offset << "\n"; - DOUT << "<--------->\n"; - #endif + DEBUG(errs() << "Offset : " << Offset << "\n" << "<--------->\n"); Offset/=4; bool FP = hasFP(MF); + unsigned Reg = MI.getOperand(0).getReg(); + bool isKill = MI.getOpcode() == XCore::STWFI && MI.getOperand(0).isKill(); + + assert(XCore::GRRegsRegisterClass->contains(Reg) && + "Unexpected register operand"); + + MachineBasicBlock &MBB = *MI.getParent(); + if (FP) { bool isUs = isImmUs(Offset); - MachineBasicBlock &MBB = *MI.getParent(); unsigned FramePtr = XCore::R10; - unsigned Reg = MI.getOperand(0).getReg(); - bool isKill = MI.getOperand(0).isKill(); - if (Reg == XCore::LR) { - // The LR should have been save in the prologue. - cerr << "saving LR to FP unimplemented\n"; - abort(); - } - - MachineInstr *New = 0; if (!isUs) { - if (!RS) { - cerr << "eliminateFrameIndex Frame size too big: " << Offset << "\n"; - abort(); - } + if (!RS) + report_fatal_error("eliminateFrameIndex Frame size too big: " + + Twine(Offset)); unsigned ScratchReg = RS->scavengeRegister(XCore::GRRegsRegisterClass, II, SPAdj); - loadConstant(MBB, II, ScratchReg, Offset); + loadConstant(MBB, II, ScratchReg, Offset, dl); switch (MI.getOpcode()) { - case XCore::LDWSP_lru6: - New = BuildMI(MBB, II, TII.get(XCore::LDW_3r), Reg) + case XCore::LDWFI: + BuildMI(MBB, II, dl, TII.get(XCore::LDW_3r), Reg) .addReg(FramePtr) - .addReg(ScratchReg, false, false, true); + .addReg(ScratchReg, RegState::Kill); break; - case XCore::STWSP_lru6: - New = BuildMI(MBB, II, TII.get(XCore::STW_3r)) - .addReg(Reg, false, false, isKill) + case XCore::STWFI: + BuildMI(MBB, II, dl, TII.get(XCore::STW_3r)) + .addReg(Reg, getKillRegState(isKill)) .addReg(FramePtr) - .addReg(ScratchReg, false, false, true); + .addReg(ScratchReg, RegState::Kill); break; - case XCore::LDAWSP_lru6: - New = BuildMI(MBB, II, TII.get(XCore::LDAWF_l3r), Reg) + case XCore::LDAWFI: + BuildMI(MBB, II, dl, TII.get(XCore::LDAWF_l3r), Reg) .addReg(FramePtr) - .addReg(ScratchReg, false, false, true); + .addReg(ScratchReg, RegState::Kill); break; default: - assert(0 && "Unexpected Opcode\n"); + llvm_unreachable("Unexpected Opcode"); } } else { switch (MI.getOpcode()) { - case XCore::LDWSP_lru6: - New = BuildMI(MBB, II, TII.get(XCore::LDW_2rus), Reg) + case XCore::LDWFI: + BuildMI(MBB, II, dl, TII.get(XCore::LDW_2rus), Reg) .addReg(FramePtr) .addImm(Offset); break; - case XCore::STWSP_lru6: - New = BuildMI(MBB, II, TII.get(XCore::STW_2rus)) - .addReg(Reg, false, false, isKill) + case XCore::STWFI: + BuildMI(MBB, II, dl, TII.get(XCore::STW_2rus)) + .addReg(Reg, getKillRegState(isKill)) .addReg(FramePtr) .addImm(Offset); break; - case XCore::LDAWSP_lru6: - New = BuildMI(MBB, II, TII.get(XCore::LDAWF_l2rus), Reg) + case XCore::LDAWFI: + BuildMI(MBB, II, dl, TII.get(XCore::LDAWF_l2rus), Reg) .addReg(FramePtr) .addImm(Offset); break; default: - assert(0 && "Unexpected Opcode\n"); + llvm_unreachable("Unexpected Opcode"); } } - - // Erase old instruction. - MBB.erase(II); } else { bool isU6 = isImmU6(Offset); - if (!isU6 && !isImmU16(Offset)) { - // FIXME could make this work for LDWSP, LDAWSP. - cerr << "eliminateFrameIndex Frame size too big: " << Offset << "\n"; - abort(); - } - - int NewOpcode = MI.getOpcode(); + if (!isU6 && !isImmU16(Offset)) + report_fatal_error("eliminateFrameIndex Frame size too big: " + + Twine(Offset)); - switch (NewOpcode) { - case XCore::LDWSP_lru6: + switch (MI.getOpcode()) { + int NewOpcode; + case XCore::LDWFI: NewOpcode = (isU6) ? XCore::LDWSP_ru6 : XCore::LDWSP_lru6; + BuildMI(MBB, II, dl, TII.get(NewOpcode), Reg) + .addImm(Offset); break; - case XCore::STWSP_lru6: + case XCore::STWFI: NewOpcode = (isU6) ? XCore::STWSP_ru6 : XCore::STWSP_lru6; + BuildMI(MBB, II, dl, TII.get(NewOpcode)) + .addReg(Reg, getKillRegState(isKill)) + .addImm(Offset); break; - case XCore::LDAWSP_lru6: + case XCore::LDAWFI: NewOpcode = (isU6) ? XCore::LDAWSP_ru6 : XCore::LDAWSP_lru6; + BuildMI(MBB, II, dl, TII.get(NewOpcode), Reg) + .addImm(Offset); break; default: - assert(0 && "Unexpected Opcode\n"); + llvm_unreachable("Unexpected Opcode"); } - - MI.setDesc(TII.get(NewOpcode)); - FrameOp.ChangeToImmediate(Offset); } + // Erase old instruction. + MBB.erase(II); } void @@ -321,9 +306,10 @@ XCoreRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF, int FrameIdx; if (! isVarArg) { // A fixed offset of 0 allows us to save / restore LR using entsp / retsp. - FrameIdx = MFI->CreateFixedObject(RC->getSize(), 0); + FrameIdx = MFI->CreateFixedObject(RC->getSize(), 0, true); } else { - FrameIdx = MFI->CreateStackObject(RC->getSize(), RC->getAlignment()); + FrameIdx = MFI->CreateStackObject(RC->getSize(), RC->getAlignment(), + false); } XFI->setUsesLR(FrameIdx); XFI->setLRSpillSlot(FrameIdx); @@ -331,13 +317,15 @@ XCoreRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF, if (requiresRegisterScavenging(MF)) { // Reserve a slot close to SP or frame pointer. RS->setScavengingFrameIndex(MFI->CreateStackObject(RC->getSize(), - RC->getAlignment())); + RC->getAlignment(), + false)); } if (hasFP(MF)) { // A callee save register is used to hold the FP. // This needs saving / restoring in the epilogue / prologue. XFI->setFPSpillSlot(MFI->CreateStackObject(RC->getSize(), - RC->getAlignment())); + RC->getAlignment(), + false)); } } @@ -348,56 +336,50 @@ processFunctionBeforeFrameFinalized(MachineFunction &MF) const { void XCoreRegisterInfo:: loadConstant(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, - unsigned DstReg, int64_t Value) const { + unsigned DstReg, int64_t Value, DebugLoc dl) const { // TODO use mkmsk if possible. if (!isImmU16(Value)) { // TODO use constant pool. - cerr << "loadConstant value too big " << Value << "\n"; - abort(); + report_fatal_error("loadConstant value too big " + Twine(Value)); } int Opcode = isImmU6(Value) ? XCore::LDC_ru6 : XCore::LDC_lru6; - BuildMI(MBB, I, TII.get(Opcode), DstReg).addImm(Value); + BuildMI(MBB, I, dl, TII.get(Opcode), DstReg).addImm(Value); } void XCoreRegisterInfo:: storeToStack(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, - unsigned SrcReg, int Offset) const { + unsigned SrcReg, int Offset, DebugLoc dl) const { assert(Offset%4 == 0 && "Misaligned stack offset"); Offset/=4; bool isU6 = isImmU6(Offset); - if (!isU6 && !isImmU16(Offset)) { - cerr << "storeToStack offset too big " << Offset << "\n"; - abort(); - } + if (!isU6 && !isImmU16(Offset)) + report_fatal_error("storeToStack offset too big " + Twine(Offset)); int Opcode = isU6 ? XCore::STWSP_ru6 : XCore::STWSP_lru6; - BuildMI(MBB, I, TII.get(Opcode)) + BuildMI(MBB, I, dl, TII.get(Opcode)) .addReg(SrcReg) - .addImm(Offset) - .addImm(0); + .addImm(Offset); } void XCoreRegisterInfo:: loadFromStack(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, - unsigned DstReg, int Offset) const { + unsigned DstReg, int Offset, DebugLoc dl) const { assert(Offset%4 == 0 && "Misaligned stack offset"); Offset/=4; bool isU6 = isImmU6(Offset); - if (!isU6 && !isImmU16(Offset)) { - cerr << "storeToStack offset too big " << Offset << "\n"; - abort(); - } + if (!isU6 && !isImmU16(Offset)) + report_fatal_error("loadFromStack offset too big " + Twine(Offset)); int Opcode = isU6 ? XCore::LDWSP_ru6 : XCore::LDWSP_lru6; - BuildMI(MBB, I, TII.get(Opcode), DstReg) - .addImm(Offset) - .addImm(0); + BuildMI(MBB, I, dl, TII.get(Opcode), DstReg) + .addImm(Offset); } void XCoreRegisterInfo::emitPrologue(MachineFunction &MF) const { MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB MachineBasicBlock::iterator MBBI = MBB.begin(); MachineFrameInfo *MFI = MF.getFrameInfo(); - MachineModuleInfo *MMI = MFI->getMachineModuleInfo(); + MachineModuleInfo *MMI = &MF.getMMI(); XCoreFunctionInfo *XFI = MF.getInfo(); + DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc(); bool FP = hasFP(MF); @@ -412,8 +394,7 @@ void XCoreRegisterInfo::emitPrologue(MachineFunction &MF) const { if (!isU6 && !isImmU16(FrameSize)) { // FIXME could emit multiple instructions. - cerr << "emitPrologue Frame size too big: " << FrameSize << "\n"; - abort(); + report_fatal_error("emitPrologue Frame size too big: " + Twine(FrameSize)); } bool emitFrameMoves = needsFrameMoves(MF); @@ -430,37 +411,36 @@ void XCoreRegisterInfo::emitPrologue(MachineFunction &MF) const { } else { Opcode = (isU6) ? XCore::EXTSP_u6 : XCore::EXTSP_lu6; } - BuildMI(MBB, MBBI, TII.get(Opcode)).addImm(FrameSize); + BuildMI(MBB, MBBI, dl, TII.get(Opcode)).addImm(FrameSize); if (emitFrameMoves) { std::vector &Moves = MMI->getFrameMoves(); // Show update of SP. - unsigned FrameLabelId = MMI->NextLabelID(); - BuildMI(MBB, MBBI, TII.get(XCore::DBG_LABEL)).addImm(FrameLabelId); + MCSymbol *FrameLabel = MMI->getContext().CreateTempSymbol(); + BuildMI(MBB, MBBI, dl, TII.get(XCore::PROLOG_LABEL)).addSym(FrameLabel); MachineLocation SPDst(MachineLocation::VirtualFP); MachineLocation SPSrc(MachineLocation::VirtualFP, -FrameSize * 4); - Moves.push_back(MachineMove(FrameLabelId, SPDst, SPSrc)); + Moves.push_back(MachineMove(FrameLabel, SPDst, SPSrc)); if (LRSavedOnEntry) { MachineLocation CSDst(MachineLocation::VirtualFP, 0); MachineLocation CSSrc(XCore::LR); - Moves.push_back(MachineMove(FrameLabelId, CSDst, CSSrc)); + Moves.push_back(MachineMove(FrameLabel, CSDst, CSSrc)); } } if (saveLR) { int LRSpillOffset = MFI->getObjectOffset(XFI->getLRSpillSlot()); - storeToStack(MBB, MBBI, XCore::LR, LRSpillOffset + FrameSize*4); + storeToStack(MBB, MBBI, XCore::LR, LRSpillOffset + FrameSize*4, dl); MBB.addLiveIn(XCore::LR); if (emitFrameMoves) { - unsigned SaveLRLabelId = MMI->NextLabelID(); - BuildMI(MBB, MBBI, TII.get(XCore::DBG_LABEL)).addImm(SaveLRLabelId); + MCSymbol *SaveLRLabel = MMI->getContext().CreateTempSymbol(); + BuildMI(MBB, MBBI, dl, TII.get(XCore::PROLOG_LABEL)).addSym(SaveLRLabel); MachineLocation CSDst(MachineLocation::VirtualFP, LRSpillOffset); MachineLocation CSSrc(XCore::LR); - MMI->getFrameMoves().push_back(MachineMove(SaveLRLabelId, - CSDst, CSSrc)); + MMI->getFrameMoves().push_back(MachineMove(SaveLRLabel, CSDst, CSSrc)); } } } @@ -468,39 +448,37 @@ void XCoreRegisterInfo::emitPrologue(MachineFunction &MF) const { if (FP) { // Save R10 to the stack. int FPSpillOffset = MFI->getObjectOffset(XFI->getFPSpillSlot()); - storeToStack(MBB, MBBI, XCore::R10, FPSpillOffset + FrameSize*4); + storeToStack(MBB, MBBI, XCore::R10, FPSpillOffset + FrameSize*4, dl); // R10 is live-in. It is killed at the spill. MBB.addLiveIn(XCore::R10); if (emitFrameMoves) { - unsigned SaveR10LabelId = MMI->NextLabelID(); - BuildMI(MBB, MBBI, TII.get(XCore::DBG_LABEL)).addImm(SaveR10LabelId); + MCSymbol *SaveR10Label = MMI->getContext().CreateTempSymbol(); + BuildMI(MBB, MBBI, dl, TII.get(XCore::PROLOG_LABEL)).addSym(SaveR10Label); MachineLocation CSDst(MachineLocation::VirtualFP, FPSpillOffset); MachineLocation CSSrc(XCore::R10); - MMI->getFrameMoves().push_back(MachineMove(SaveR10LabelId, - CSDst, CSSrc)); + MMI->getFrameMoves().push_back(MachineMove(SaveR10Label, CSDst, CSSrc)); } // Set the FP from the SP. unsigned FramePtr = XCore::R10; - BuildMI(MBB, MBBI, TII.get(XCore::LDAWSP_ru6), FramePtr) - .addImm(0) + BuildMI(MBB, MBBI, dl, TII.get(XCore::LDAWSP_ru6), FramePtr) .addImm(0); if (emitFrameMoves) { // Show FP is now valid. - unsigned FrameLabelId = MMI->NextLabelID(); - BuildMI(MBB, MBBI, TII.get(XCore::DBG_LABEL)).addImm(FrameLabelId); + MCSymbol *FrameLabel = MMI->getContext().CreateTempSymbol(); + BuildMI(MBB, MBBI, dl, TII.get(XCore::PROLOG_LABEL)).addSym(FrameLabel); MachineLocation SPDst(FramePtr); MachineLocation SPSrc(MachineLocation::VirtualFP); - MMI->getFrameMoves().push_back(MachineMove(FrameLabelId, SPDst, SPSrc)); + MMI->getFrameMoves().push_back(MachineMove(FrameLabel, SPDst, SPSrc)); } } if (emitFrameMoves) { // Frame moves for callee saved. std::vector &Moves = MMI->getFrameMoves(); - std::vector >&SpillLabels = + std::vector >&SpillLabels = XFI->getSpillLabels(); for (unsigned I = 0, E = SpillLabels.size(); I != E; ++I) { - unsigned SpillLabel = SpillLabels[I].first; + MCSymbol *SpillLabel = SpillLabels[I].first; CalleeSavedInfo &CSI = SpillLabels[I].second; int Offset = MFI->getObjectOffset(CSI.getFrameIdx()); unsigned Reg = CSI.getReg(); @@ -515,13 +493,14 @@ void XCoreRegisterInfo::emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const { MachineFrameInfo *MFI = MF.getFrameInfo(); MachineBasicBlock::iterator MBBI = prior(MBB.end()); + DebugLoc dl = MBBI->getDebugLoc(); bool FP = hasFP(MF); if (FP) { // Restore the stack pointer. unsigned FramePtr = XCore::R10; - BuildMI(MBB, MBBI, TII.get(XCore::SETSP_1r)) + BuildMI(MBB, MBBI, dl, TII.get(XCore::SETSP_1r)) .addReg(FramePtr); } @@ -536,8 +515,7 @@ void XCoreRegisterInfo::emitEpilogue(MachineFunction &MF, if (!isU6 && !isImmU16(FrameSize)) { // FIXME could emit multiple instructions. - cerr << "emitEpilogue Frame size too big: " << FrameSize << "\n"; - abort(); + report_fatal_error("emitEpilogue Frame size too big: " + Twine(FrameSize)); } if (FrameSize) { @@ -547,13 +525,13 @@ void XCoreRegisterInfo::emitEpilogue(MachineFunction &MF, // Restore R10 int FPSpillOffset = MFI->getObjectOffset(XFI->getFPSpillSlot()); FPSpillOffset += FrameSize*4; - loadFromStack(MBB, MBBI, XCore::R10, FPSpillOffset); + loadFromStack(MBB, MBBI, XCore::R10, FPSpillOffset, dl); } bool restoreLR = XFI->getUsesLR(); if (restoreLR && MFI->getObjectOffset(XFI->getLRSpillSlot()) != 0) { int LRSpillOffset = MFI->getObjectOffset(XFI->getLRSpillSlot()); LRSpillOffset += FrameSize*4; - loadFromStack(MBB, MBBI, XCore::LR, LRSpillOffset); + loadFromStack(MBB, MBBI, XCore::LR, LRSpillOffset, dl); restoreLR = false; } if (restoreLR) { @@ -561,11 +539,11 @@ void XCoreRegisterInfo::emitEpilogue(MachineFunction &MF, assert(MBBI->getOpcode() == XCore::RETSP_u6 || MBBI->getOpcode() == XCore::RETSP_lu6); int Opcode = (isU6) ? XCore::RETSP_u6 : XCore::RETSP_lu6; - BuildMI(MBB, MBBI, TII.get(Opcode)).addImm(FrameSize); + BuildMI(MBB, MBBI, dl, TII.get(Opcode)).addImm(FrameSize); MBB.erase(MBBI); } else { int Opcode = (isU6) ? XCore::LDAWSP_ru6_RRegs : XCore::LDAWSP_lru6_RRegs; - BuildMI(MBB, MBBI, TII.get(Opcode), XCore::SP).addImm(FrameSize); + BuildMI(MBB, MBBI, dl, TII.get(Opcode), XCore::SP).addImm(FrameSize); } } } @@ -574,7 +552,7 @@ int XCoreRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const { return XCoreGenRegisterInfo::getDwarfRegNumFull(RegNum, 0); } -unsigned XCoreRegisterInfo::getFrameRegister(MachineFunction &MF) const { +unsigned XCoreRegisterInfo::getFrameRegister(const MachineFunction &MF) const { bool FP = hasFP(MF); return FP ? XCore::R10 : XCore::SP;