X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=test%2FBitcode%2Farm32_neon_vcnt_upgrade.ll;h=10b9284e9814ea3d01caed32dba2c297c4a88331;hb=6220c8f960fe287efcfc27f46ab6ad48e5b3c5d2;hp=b3f2f03d1086f1bd6e2f58a581a23b0b06012b9e;hpb=06a6a300c5f7100e4665667c689369e078d2ad59;p=oota-llvm.git

diff --git a/test/Bitcode/arm32_neon_vcnt_upgrade.ll b/test/Bitcode/arm32_neon_vcnt_upgrade.ll
index b3f2f03d108..10b9284e981 100644
--- a/test/Bitcode/arm32_neon_vcnt_upgrade.ll
+++ b/test/Bitcode/arm32_neon_vcnt_upgrade.ll
@@ -1,5 +1,5 @@
 ; RUN: llvm-as < %s | llvm-dis | FileCheck %s
-; NB: currently tests only vclz, should also test vcnt and vcls
+; Tests vclz and vcnt
 
 define <4 x i16> @vclz16(<4 x i16>* %A) nounwind {
 ;CHECK: @vclz16
@@ -9,4 +9,13 @@ define <4 x i16> @vclz16(<4 x i16>* %A) nounwind {
         ret <4 x i16> %tmp2
 }
 
+define <8 x i8> @vcnt8(<8 x i8>* %A) nounwind {
+;CHECK: @vcnt8
+        %tmp1 = load <8 x i8>* %A
+        %tmp2 = call <8 x i8> @llvm.arm.neon.vcnt.v8i8(<8 x i8> %tmp1)
+;CHECK: call <8 x i8> @llvm.ctpop.v8i8(<8 x i8>
+        ret <8 x i8> %tmp2
+}
+
 declare <4 x i16>  @llvm.arm.neon.vclz.v4i16(<4 x i16>) nounwind readnone
+declare <8 x i8>  @llvm.arm.neon.vcnt.v8i8(<8 x i8>) nounwind readnone