X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=test%2FCodeGen%2FMips%2Fmsa%2F2rf_float_int.ll;h=3b5dfda2d1e60b93031192bdf3c954c80831c7c9;hb=1800766f5aa2ff283dc2575fdd00c2a1750f9d02;hp=e0a60d6a2d68de487a9cdb177c9962b7ba1b48f7;hpb=f1ef27e6e308435035ffec112a6474ed5e009484;p=oota-llvm.git

diff --git a/test/CodeGen/Mips/msa/2rf_float_int.ll b/test/CodeGen/Mips/msa/2rf_float_int.ll
index e0a60d6a2d6..3b5dfda2d1e 100644
--- a/test/CodeGen/Mips/msa/2rf_float_int.ll
+++ b/test/CodeGen/Mips/msa/2rf_float_int.ll
@@ -2,6 +2,7 @@
 ; with the 2RF instruction format.
 
 ; RUN: llc -march=mips -mattr=+msa,+fp64 < %s | FileCheck %s
+; RUN: llc -march=mipsel -mattr=+msa,+fp64 < %s | FileCheck %s
 
 @llvm_mips_ffint_s_w_ARG1 = global <4 x i32> <i32 0, i32 1, i32 2, i32 3>, align 16
 @llvm_mips_ffint_s_w_RES  = global <4 x float> <float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00>, align 16
@@ -17,9 +18,11 @@ entry:
 declare <4 x float> @llvm.mips.ffint.s.w(<4 x i32>) nounwind
 
 ; CHECK: llvm_mips_ffint_s_w_test:
-; CHECK: ld.w
-; CHECK: ffint_s.w
-; CHECK: st.w
+; CHECK-DAG: lw [[R1:\$[0-9]+]], %got(llvm_mips_ffint_s_w_ARG1)
+; CHECK-DAG: ld.w [[WS:\$w[0-9]+]], 0([[R1]])
+; CHECK-DAG: ffint_s.w [[WD:\$w[0-9]+]], [[WS]]
+; CHECK-DAG: lw [[R2:\$[0-9]+]], %got(llvm_mips_ffint_s_w_RES)
+; CHECK-DAG: st.w [[WD]], 0([[R2]])
 ; CHECK: .size llvm_mips_ffint_s_w_test
 ;
 @llvm_mips_ffint_s_d_ARG1 = global <2 x i64> <i64 0, i64 1>, align 16
@@ -36,9 +39,11 @@ entry:
 declare <2 x double> @llvm.mips.ffint.s.d(<2 x i64>) nounwind
 
 ; CHECK: llvm_mips_ffint_s_d_test:
-; CHECK: ld.d
-; CHECK: ffint_s.d
-; CHECK: st.d
+; CHECK-DAG: lw [[R1:\$[0-9]+]], %got(llvm_mips_ffint_s_d_ARG1)
+; CHECK-DAG: ld.d [[WS:\$w[0-9]+]], 0([[R1]])
+; CHECK-DAG: ffint_s.d [[WD:\$w[0-9]+]], [[WS]]
+; CHECK-DAG: lw [[R2:\$[0-9]+]], %got(llvm_mips_ffint_s_d_RES)
+; CHECK-DAG: st.d [[WD]], 0([[R2]])
 ; CHECK: .size llvm_mips_ffint_s_d_test
 ;
 @llvm_mips_ffint_u_w_ARG1 = global <4 x i32> <i32 0, i32 1, i32 2, i32 3>, align 16
@@ -55,9 +60,11 @@ entry:
 declare <4 x float> @llvm.mips.ffint.u.w(<4 x i32>) nounwind
 
 ; CHECK: llvm_mips_ffint_u_w_test:
-; CHECK: ld.w
-; CHECK: ffint_u.w
-; CHECK: st.w
+; CHECK-DAG: lw [[R1:\$[0-9]+]], %got(llvm_mips_ffint_u_w_ARG1)
+; CHECK-DAG: ld.w [[WS:\$w[0-9]+]], 0([[R1]])
+; CHECK-DAG: ffint_u.w [[WD:\$w[0-9]+]], [[WS]]
+; CHECK-DAG: lw [[R2:\$[0-9]+]], %got(llvm_mips_ffint_u_w_RES)
+; CHECK-DAG: st.w [[WD]], 0([[R2]])
 ; CHECK: .size llvm_mips_ffint_u_w_test
 ;
 @llvm_mips_ffint_u_d_ARG1 = global <2 x i64> <i64 0, i64 1>, align 16
@@ -74,8 +81,10 @@ entry:
 declare <2 x double> @llvm.mips.ffint.u.d(<2 x i64>) nounwind
 
 ; CHECK: llvm_mips_ffint_u_d_test:
-; CHECK: ld.d
-; CHECK: ffint_u.d
-; CHECK: st.d
+; CHECK-DAG: lw [[R1:\$[0-9]+]], %got(llvm_mips_ffint_u_d_ARG1)
+; CHECK-DAG: ld.d [[WS:\$w[0-9]+]], 0([[R1]])
+; CHECK-DAG: ffint_u.d [[WD:\$w[0-9]+]], [[WS]]
+; CHECK-DAG: lw [[R2:\$[0-9]+]], %got(llvm_mips_ffint_u_d_RES)
+; CHECK-DAG: st.d [[WD]], 0([[R2]])
 ; CHECK: .size llvm_mips_ffint_u_d_test
 ;