X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=test%2FCodeGen%2FR600%2Fllvm.AMDGPU.cvt_f32_ubyte.ll;h=8b32f696449ee4d5cdfc71d0fb0ab8eed31ee10d;hb=1e3da044d8926d800ab44bfd8c265c29e2d21752;hp=6facb4782e98d453311c20a8bcbe14528621351e;hpb=8a9df8f92c3b2c9ed822245d8348c3609923f382;p=oota-llvm.git diff --git a/test/CodeGen/R600/llvm.AMDGPU.cvt_f32_ubyte.ll b/test/CodeGen/R600/llvm.AMDGPU.cvt_f32_ubyte.ll index 6facb4782e9..8b32f696449 100644 --- a/test/CodeGen/R600/llvm.AMDGPU.cvt_f32_ubyte.ll +++ b/test/CodeGen/R600/llvm.AMDGPU.cvt_f32_ubyte.ll @@ -1,41 +1,42 @@ -; RUN: llc -march=r600 -mcpu=SI < %s | FileCheck -check-prefix=SI %s +; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI %s +; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI %s declare float @llvm.AMDGPU.cvt.f32.ubyte0(i32) nounwind readnone declare float @llvm.AMDGPU.cvt.f32.ubyte1(i32) nounwind readnone declare float @llvm.AMDGPU.cvt.f32.ubyte2(i32) nounwind readnone declare float @llvm.AMDGPU.cvt.f32.ubyte3(i32) nounwind readnone -; SI-LABEL: @test_unpack_byte0_to_float: -; SI: V_CVT_F32_UBYTE0 +; SI-LABEL: {{^}}test_unpack_byte0_to_float: +; SI: v_cvt_f32_ubyte0 define void @test_unpack_byte0_to_float(float addrspace(1)* %out, i32 addrspace(1)* %in) nounwind { - %val = load i32 addrspace(1)* %in, align 4 + %val = load i32, i32 addrspace(1)* %in, align 4 %cvt = call float @llvm.AMDGPU.cvt.f32.ubyte0(i32 %val) nounwind readnone store float %cvt, float addrspace(1)* %out, align 4 ret void } -; SI-LABEL: @test_unpack_byte1_to_float: -; SI: V_CVT_F32_UBYTE1 +; SI-LABEL: {{^}}test_unpack_byte1_to_float: +; SI: v_cvt_f32_ubyte1 define void @test_unpack_byte1_to_float(float addrspace(1)* %out, i32 addrspace(1)* %in) nounwind { - %val = load i32 addrspace(1)* %in, align 4 + %val = load i32, i32 addrspace(1)* %in, align 4 %cvt = call float @llvm.AMDGPU.cvt.f32.ubyte1(i32 %val) nounwind readnone store float %cvt, float addrspace(1)* %out, align 4 ret void } -; SI-LABEL: @test_unpack_byte2_to_float: -; SI: V_CVT_F32_UBYTE2 +; SI-LABEL: {{^}}test_unpack_byte2_to_float: +; SI: v_cvt_f32_ubyte2 define void @test_unpack_byte2_to_float(float addrspace(1)* %out, i32 addrspace(1)* %in) nounwind { - %val = load i32 addrspace(1)* %in, align 4 + %val = load i32, i32 addrspace(1)* %in, align 4 %cvt = call float @llvm.AMDGPU.cvt.f32.ubyte2(i32 %val) nounwind readnone store float %cvt, float addrspace(1)* %out, align 4 ret void } -; SI-LABEL: @test_unpack_byte3_to_float: -; SI: V_CVT_F32_UBYTE3 +; SI-LABEL: {{^}}test_unpack_byte3_to_float: +; SI: v_cvt_f32_ubyte3 define void @test_unpack_byte3_to_float(float addrspace(1)* %out, i32 addrspace(1)* %in) nounwind { - %val = load i32 addrspace(1)* %in, align 4 + %val = load i32, i32 addrspace(1)* %in, align 4 %cvt = call float @llvm.AMDGPU.cvt.f32.ubyte3(i32 %val) nounwind readnone store float %cvt, float addrspace(1)* %out, align 4 ret void