X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=test%2FCodeGen%2FThumb2%2Fthumb2-orn.ll;h=e1f0bba7c4b86e0e3abb5b0f996a6c58fb303e42;hb=8154ef7589acc76850d6e430adfc0d60e82d94cf;hp=97a3fd75f068547f455f1d9fa53f9c6d25d8ee34;hpb=18d18b71d5955274b95ac96cbb8353b4766d1995;p=oota-llvm.git diff --git a/test/CodeGen/Thumb2/thumb2-orn.ll b/test/CodeGen/Thumb2/thumb2-orn.ll index 97a3fd75f06..e1f0bba7c4b 100644 --- a/test/CodeGen/Thumb2/thumb2-orn.ll +++ b/test/CodeGen/Thumb2/thumb2-orn.ll @@ -1,12 +1,11 @@ -; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s - +; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s define i32 @f1(i32 %a, i32 %b) { %tmp = xor i32 %b, 4294967295 %tmp1 = or i32 %a, %tmp ret i32 %tmp1 } -; CHECK: f1: +; CHECK-LABEL: f1: ; CHECK: orn r0, r0, r1 define i32 @f2(i32 %a, i32 %b) { @@ -14,7 +13,7 @@ define i32 @f2(i32 %a, i32 %b) { %tmp1 = or i32 %tmp, %a ret i32 %tmp1 } -; CHECK: f2: +; CHECK-LABEL: f2: ; CHECK: orn r0, r0, r1 define i32 @f3(i32 %a, i32 %b) { @@ -22,7 +21,7 @@ define i32 @f3(i32 %a, i32 %b) { %tmp1 = or i32 %a, %tmp ret i32 %tmp1 } -; CHECK: f3: +; CHECK-LABEL: f3: ; CHECK: orn r0, r0, r1 define i32 @f4(i32 %a, i32 %b) { @@ -30,7 +29,7 @@ define i32 @f4(i32 %a, i32 %b) { %tmp1 = or i32 %tmp, %a ret i32 %tmp1 } -; CHECK: f4: +; CHECK-LABEL: f4: ; CHECK: orn r0, r0, r1 define i32 @f5(i32 %a, i32 %b) { @@ -39,7 +38,7 @@ define i32 @f5(i32 %a, i32 %b) { %tmp2 = or i32 %a, %tmp1 ret i32 %tmp2 } -; CHECK: f5: +; CHECK-LABEL: f5: ; CHECK: orn r0, r0, r1, lsl #5 define i32 @f6(i32 %a, i32 %b) { @@ -48,7 +47,7 @@ define i32 @f6(i32 %a, i32 %b) { %tmp2 = or i32 %a, %tmp1 ret i32 %tmp2 } -; CHECK: f6: +; CHECK-LABEL: f6: ; CHECK: orn r0, r0, r1, lsr #6 define i32 @f7(i32 %a, i32 %b) { @@ -57,7 +56,7 @@ define i32 @f7(i32 %a, i32 %b) { %tmp2 = or i32 %a, %tmp1 ret i32 %tmp2 } -; CHECK: f7: +; CHECK-LABEL: f7: ; CHECK: orn r0, r0, r1, asr #7 define i32 @f8(i32 %a, i32 %b) { @@ -68,5 +67,5 @@ define i32 @f8(i32 %a, i32 %b) { %tmp2 = or i32 %a, %tmp1 ret i32 %tmp2 } -; CHECK: f8: +; CHECK-LABEL: f8: ; CHECK: orn r0, r0, r0, ror #8