X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=test%2FCodeGen%2FX86%2Fatomic_op.ll;h=a378d6e8d684f3992a819e5863bc0a05ff9abb1f;hb=38103d1012cb8a51da8866134886a0a8f35f4e30;hp=72ff97194db5af2fb69ab18875caf89804d4e60d;hpb=93c4a5bef780e43552d3b9d702756d3acb7801d2;p=oota-llvm.git

diff --git a/test/CodeGen/X86/atomic_op.ll b/test/CodeGen/X86/atomic_op.ll
index 72ff97194db..a378d6e8d68 100644
--- a/test/CodeGen/X86/atomic_op.ll
+++ b/test/CodeGen/X86/atomic_op.ll
@@ -1,8 +1,8 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s -mcpu=generic -march=x86 -mattr=+cmov -verify-machineinstrs | FileCheck %s
 
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
 
-define void @main(i32 %argc, i8** %argv) nounwind {
+define void @func(i32 %argc, i8** %argv) nounwind {
 entry:
 	%argc.addr = alloca i32		; <i32*> [#uses=1]
 	%argv.addr = alloca i8**		; <i8***> [#uses=1]
@@ -13,6 +13,7 @@ entry:
 	%xort = alloca i32		; <i32*> [#uses=2]
 	%old = alloca i32		; <i32*> [#uses=18]
 	%temp = alloca i32		; <i32*> [#uses=2]
+	%temp64 = alloca i64
 	store i32 %argc, i32* %argc.addr
 	store i8** %argv, i8*** %argv.addr
 	store i32 0, i32* %val1
@@ -24,120 +25,114 @@ entry:
 	%tmp = load i32* %temp
         ; CHECK: lock
         ; CHECK: xaddl
-	call i32 @llvm.atomic.load.add.i32.p0i32( i32* %val1, i32 %tmp )		; <i32>:0 [#uses=1]
+  %0 = atomicrmw add i32* %val1, i32 %tmp monotonic
 	store i32 %0, i32* %old
         ; CHECK: lock
         ; CHECK: xaddl
-	call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %val2, i32 30 )		; <i32>:1 [#uses=1]
+  %1 = atomicrmw sub i32* %val2, i32 30 monotonic
 	store i32 %1, i32* %old
         ; CHECK: lock
         ; CHECK: xaddl
-	call i32 @llvm.atomic.load.add.i32.p0i32( i32* %val2, i32 1 )		; <i32>:2 [#uses=1]
+  %2 = atomicrmw add i32* %val2, i32 1 monotonic
 	store i32 %2, i32* %old
         ; CHECK: lock
         ; CHECK: xaddl
-	call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %val2, i32 1 )		; <i32>:3 [#uses=1]
+  %3 = atomicrmw sub i32* %val2, i32 1 monotonic
 	store i32 %3, i32* %old
         ; CHECK: andl
         ; CHECK: lock
         ; CHECK: cmpxchgl
-	call i32 @llvm.atomic.load.and.i32.p0i32( i32* %andt, i32 4080 )		; <i32>:4 [#uses=1]
+  %4 = atomicrmw and i32* %andt, i32 4080 monotonic
 	store i32 %4, i32* %old
         ; CHECK: orl
         ; CHECK: lock
         ; CHECK: cmpxchgl
-	call i32 @llvm.atomic.load.or.i32.p0i32( i32* %ort, i32 4080 )		; <i32>:5 [#uses=1]
+  %5 = atomicrmw or i32* %ort, i32 4080 monotonic
 	store i32 %5, i32* %old
         ; CHECK: xorl
         ; CHECK: lock
         ; CHECK: cmpxchgl
-	call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %xort, i32 4080 )		; <i32>:6 [#uses=1]
+  %6 = atomicrmw xor i32* %xort, i32 4080 monotonic
 	store i32 %6, i32* %old
         ; CHECK: cmov
         ; CHECK: lock
         ; CHECK: cmpxchgl
-	call i32 @llvm.atomic.load.min.i32.p0i32( i32* %val2, i32 16 )		; <i32>:7 [#uses=1]
+  %7 = atomicrmw min i32* %val2, i32 16 monotonic
 	store i32 %7, i32* %old
 	%neg = sub i32 0, 1		; <i32> [#uses=1]
         ; CHECK: cmov
         ; CHECK: lock
         ; CHECK: cmpxchgl
-	call i32 @llvm.atomic.load.min.i32.p0i32( i32* %val2, i32 %neg )		; <i32>:8 [#uses=1]
+  %8 = atomicrmw min i32* %val2, i32 %neg monotonic
 	store i32 %8, i32* %old
         ; CHECK: cmov
         ; CHECK: lock
         ; CHECK: cmpxchgl
-	call i32 @llvm.atomic.load.max.i32.p0i32( i32* %val2, i32 1 )		; <i32>:9 [#uses=1]
+  %9 = atomicrmw max i32* %val2, i32 1 monotonic
 	store i32 %9, i32* %old
         ; CHECK: cmov
         ; CHECK: lock
         ; CHECK: cmpxchgl
-	call i32 @llvm.atomic.load.max.i32.p0i32( i32* %val2, i32 0 )		; <i32>:10 [#uses=1]
+  %10 = atomicrmw max i32* %val2, i32 0 monotonic
 	store i32 %10, i32* %old
         ; CHECK: cmov
         ; CHECK: lock
         ; CHECK: cmpxchgl
-	call i32 @llvm.atomic.load.umax.i32.p0i32( i32* %val2, i32 65535 )		; <i32>:11 [#uses=1]
+  %11 = atomicrmw umax i32* %val2, i32 65535 monotonic
 	store i32 %11, i32* %old
         ; CHECK: cmov
         ; CHECK: lock
         ; CHECK: cmpxchgl
-	call i32 @llvm.atomic.load.umax.i32.p0i32( i32* %val2, i32 10 )		; <i32>:12 [#uses=1]
+  %12 = atomicrmw umax i32* %val2, i32 10 monotonic
 	store i32 %12, i32* %old
         ; CHECK: cmov
         ; CHECK: lock
         ; CHECK: cmpxchgl
-	call i32 @llvm.atomic.load.umin.i32.p0i32( i32* %val2, i32 1 )		; <i32>:13 [#uses=1]
+  %13 = atomicrmw umin i32* %val2, i32 1 monotonic
 	store i32 %13, i32* %old
         ; CHECK: cmov
         ; CHECK: lock
         ; CHECK: cmpxchgl
-	call i32 @llvm.atomic.load.umin.i32.p0i32( i32* %val2, i32 10 )		; <i32>:14 [#uses=1]
+  %14 = atomicrmw umin i32* %val2, i32 10 monotonic
 	store i32 %14, i32* %old
         ; CHECK: xchgl   %{{.*}}, {{.*}}(%esp)
-	call i32 @llvm.atomic.swap.i32.p0i32( i32* %val2, i32 1976 )		; <i32>:15 [#uses=1]
+  %15 = atomicrmw xchg i32* %val2, i32 1976 monotonic
 	store i32 %15, i32* %old
 	%neg1 = sub i32 0, 10		; <i32> [#uses=1]
         ; CHECK: lock
         ; CHECK: cmpxchgl
-	call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %val2, i32 %neg1, i32 1 )		; <i32>:16 [#uses=1]
+  %16 = cmpxchg i32* %val2, i32 %neg1, i32 1 monotonic
 	store i32 %16, i32* %old
         ; CHECK: lock
         ; CHECK: cmpxchgl
-	call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %val2, i32 1976, i32 1 )		; <i32>:17 [#uses=1]
+  %17 = cmpxchg i32* %val2, i32 1976, i32 1 monotonic
 	store i32 %17, i32* %old
+        ; CHECK: movl  [[R17atomic:.*]], %eax
+        ; CHECK: movl	$1401, %[[R17mask:[a-z]*]]
+        ; CHECK: andl	%eax, %[[R17mask]]
+        ; CHECK: notl	%[[R17mask]]
+        ; CHECK: lock
+        ; CHECK: cmpxchgl	%[[R17mask]], [[R17atomic]]
+        ; CHECK: jne
+        ; CHECK: movl	%eax,
+  %18 = atomicrmw nand i32* %val2, i32 1401 monotonic
+  store i32 %18, i32* %old
+        ; CHECK: andl
+        ; CHECK: andl
+        ; CHECK: notl
+        ; CHECK: notl
+        ; CHECK: lock
+        ; CHECK: cmpxchg8b
+  %19 = atomicrmw nand i64* %temp64, i64 17361641481138401520 monotonic
+  store i64 %19, i64* %temp64
 	ret void
 }
 
 define void @test2(i32 addrspace(256)* nocapture %P) nounwind {
 entry:
 ; CHECK: lock
-; CEHCK:	cmpxchgl	%{{.*}}, %gs:(%{{.*}})
+; CHECK:	cmpxchgl	%{{.*}}, %gs:(%{{.*}})
 
-  %0 = tail call i32 @llvm.atomic.cmp.swap.i32.p256i32(i32 addrspace(256)* %P, i32 0, i32 1)
+  %0 = cmpxchg i32 addrspace(256)* %P, i32 0, i32 1 monotonic
   ret void
 }
-
-declare i32 @llvm.atomic.cmp.swap.i32.p256i32(i32 addrspace(256)* nocapture, i32, i32) nounwind
-
-declare i32 @llvm.atomic.load.add.i32.p0i32(i32*, i32) nounwind 
-
-declare i32 @llvm.atomic.load.sub.i32.p0i32(i32*, i32) nounwind 
-
-declare i32 @llvm.atomic.load.and.i32.p0i32(i32*, i32) nounwind 
-
-declare i32 @llvm.atomic.load.or.i32.p0i32(i32*, i32) nounwind 
-
-declare i32 @llvm.atomic.load.xor.i32.p0i32(i32*, i32) nounwind 
-
-declare i32 @llvm.atomic.load.min.i32.p0i32(i32*, i32) nounwind 
-
-declare i32 @llvm.atomic.load.max.i32.p0i32(i32*, i32) nounwind 
-
-declare i32 @llvm.atomic.load.umax.i32.p0i32(i32*, i32) nounwind 
-
-declare i32 @llvm.atomic.load.umin.i32.p0i32(i32*, i32) nounwind 
-
-declare i32 @llvm.atomic.swap.i32.p0i32(i32*, i32) nounwind 
-
-declare i32 @llvm.atomic.cmp.swap.i32.p0i32(i32*, i32, i32) nounwind