X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=test%2FTableGen%2FMultiPat.td;h=b3792777b6b5e2575aad18f7145324b9b29d5344;hb=ccbfd5b18a79a07229f11af478843eae16ac9b26;hp=ed14438ca616afeebb3a25c5667cc399fc809254;hpb=fd56d75396fd945d5cedb634d34fb3c3f739b3e8;p=oota-llvm.git diff --git a/test/TableGen/MultiPat.td b/test/TableGen/MultiPat.td index ed14438ca61..b3792777b6b 100644 --- a/test/TableGen/MultiPat.td +++ b/test/TableGen/MultiPat.td @@ -1,4 +1,5 @@ -// RUN: tblgen %s | FileCheck %s +// RUN: llvm-tblgen %s | FileCheck %s +// XFAIL: vg_leak class ValueType { int Size = size; @@ -85,16 +86,8 @@ def int_x86_sse2_add_ps : Intrinsic<"addps">; def int_x86_sse2_add_pd : Intrinsic<"addpd">; def INTRINSIC : Intrinsic<"Dummy">; def bitconvert; -def add; -class MakePatImpl patterns> : Pat; -class MakePat patterns, - string suffix, - string intr> : MakePatImpl(!subst("SUFFIX", suffix, intr)), - !subst(REGCLASS, VR128, - !subst(MNEMONIC, set, Decls.operand)))))>; +class MakePat patterns> : Pat; class Base opcode, dag opnds, dag iopnds, string asmstr, Intrinsic intr, list> patterns> @@ -103,7 +96,12 @@ class Base opcode, dag opnds, dag iopnds, string asmstr, Intrinsic intr, !foreach(Decls.operand, Decls.pattern, !subst(INTRINSIC, intr, !subst(REGCLASS, VR128, - !subst(MNEMONIC, set, Decls.operand)))))>; + !subst(MNEMONIC, set, Decls.operand)))))>, + MakePat; multiclass arith opcode, string asmstr, string intr, list> patterns> { def PS : Base opcode, string asmstr, string intr, list> pat def PD : Base(!subst("SUFFIX", "_pd", intr)), patterns>; - - multidef pats, 1> : MakePat; - multidef pats, 1> : MakePat; } defm ADD : arith<0x58, "add", "int_x86_sse2_addSUFFIX", // rr Patterns [[(set REGCLASS:$dst, (INTRINSIC REGCLASS:$src1, REGCLASS:$src2))], [(set REGCLASS:$dst, (bitconvert (INTRINSIC REGCLASS:$src1, REGCLASS:$src2))), - (MNEMONIC REGCLASS:$dst, REGCLASS:$src)], - [(set REGCLASS:$dst, (add (INTRINSIC REGCLASS:$src1, REGCLASS:$src2))), - (MNEMONIC (add REGCLASS:$dst, REGCLASS:$src))]]>; + (MNEMONIC REGCLASS:$dst, REGCLASS:$src)]]>; // CHECK: [(set VR128:$dst, (int_x86_sse2_add_pd VR128:$src1, VR128:$src2))] // CHECK: [(set VR128:$dst, (int_x86_sse2_add_ps VR128:$src1, VR128:$src2))]