X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=test%2FTransforms%2FInstCombine%2Fdiv.ll;h=f67fd1c51be3d4691d9bcd665ae4e0d322c62f4d;hb=b55dcfe47fbbcfc1dccd07cb27c02b9a86533d05;hp=fdcbd02578050e98d4fbd972aee448b5bfbcbe89;hpb=1628cec4d7fce310d9cde0bcc73997e5a71692c4;p=oota-llvm.git diff --git a/test/Transforms/InstCombine/div.ll b/test/Transforms/InstCombine/div.ll index fdcbd025780..f67fd1c51be 100644 --- a/test/Transforms/InstCombine/div.ll +++ b/test/Transforms/InstCombine/div.ll @@ -1,68 +1,134 @@ ; This test makes sure that div instructions are properly eliminated. -; -; RUN: llvm-as < %s | opt -instcombine | llvm-dis | not grep div +; RUN: opt < %s -instcombine -S | FileCheck %s -implementation +define i32 @test1(i32 %A) { + %B = sdiv i32 %A, 1 ; [#uses=1] + ret i32 %B +; CHECK-LABEL: @test1( +; CHECK-NEXT: ret i32 %A +} + +define i32 @test2(i32 %A) { + ; => Shift + %B = udiv i32 %A, 8 ; [#uses=1] + ret i32 %B +; CHECK-LABEL: @test2( +; CHECK-NEXT: lshr i32 %A, 3 +} + +define i32 @test3(i32 %A) { + ; => 0, don't need to keep traps + %B = sdiv i32 0, %A ; [#uses=1] + ret i32 %B +; CHECK-LABEL: @test3( +; CHECK-NEXT: ret i32 0 +} + +define i32 @test4(i32 %A) { + ; 0-A + %B = sdiv i32 %A, -1 ; [#uses=1] + ret i32 %B +; CHECK-LABEL: @test4( +; CHECK-NEXT: sub i32 0, %A +} -int %test1(int %A) { - %B = div int %A, 1 - ret int %B +define i32 @test5(i32 %A) { + %B = udiv i32 %A, -16 ; [#uses=1] + %C = udiv i32 %B, -4 ; [#uses=1] + ret i32 %C +; CHECK-LABEL: @test5( +; CHECK-NEXT: ret i32 0 } -uint %test2(uint %A) { - %B = div uint %A, 8 ; => Shift - ret uint %B +define i1 @test6(i32 %A) { + %B = udiv i32 %A, 123 ; [#uses=1] + ; A < 123 + %C = icmp eq i32 %B, 0 ; [#uses=1] + ret i1 %C +; CHECK-LABEL: @test6( +; CHECK-NEXT: icmp ult i32 %A, 123 } -int %test3(int %A) { - %B = div int 0, %A ; => 0, don't need to keep traps - ret int %B +define i1 @test7(i32 %A) { + %B = udiv i32 %A, 10 ; [#uses=1] + ; A >= 20 && A < 30 + %C = icmp eq i32 %B, 2 ; [#uses=1] + ret i1 %C +; CHECK-LABEL: @test7( +; CHECK-NEXT: add i32 %A, -20 +; CHECK-NEXT: icmp ult i32 } -int %test4(int %A) { - %B = div int %A, -1 ; 0-A - ret int %B +define i1 @test8(i8 %A) { + %B = udiv i8 %A, 123 ; [#uses=1] + ; A >= 246 + %C = icmp eq i8 %B, 2 ; [#uses=1] + ret i1 %C +; CHECK-LABEL: @test8( +; CHECK-NEXT: icmp ugt i8 %A, -11 } -uint %test5(uint %A) { - %B = div uint %A, 4294967280 - %C = div uint %B, 4294967292 - ret uint %C +define i1 @test9(i8 %A) { + %B = udiv i8 %A, 123 ; [#uses=1] + ; A < 246 + %C = icmp ne i8 %B, 2 ; [#uses=1] + ret i1 %C +; CHECK-LABEL: @test9( +; CHECK-NEXT: icmp ult i8 %A, -10 } -bool %test6(uint %A) { - %B = div uint %A, 123 - %C = seteq uint %B, 0 ; A < 123 - ret bool %C -} +define i32 @test10(i32 %X, i1 %C) { + %V = select i1 %C, i32 64, i32 8 ; [#uses=1] + %R = udiv i32 %X, %V ; [#uses=1] + ret i32 %R +; CHECK-LABEL: @test10( +; CHECK-NEXT: select i1 %C, i32 6, i32 3 +; CHECK-NEXT: lshr i32 %X +} + +define i32 @test11(i32 %X, i1 %C) { + %A = select i1 %C, i32 1024, i32 32 ; [#uses=1] + %B = udiv i32 %X, %A ; [#uses=1] + ret i32 %B +; CHECK-LABEL: @test11( +; CHECK-NEXT: select i1 %C, i32 10, i32 5 +; CHECK-NEXT: lshr i32 %X +} -bool %test7(uint %A) { - %B = div uint %A, 10 - %C = seteq uint %B, 2 ; A >= 20 && A < 30 - ret bool %C +; PR2328 +define i32 @test12(i32 %x) nounwind { + %tmp3 = udiv i32 %x, %x ; 1 + ret i32 %tmp3 +; CHECK-LABEL: @test12( +; CHECK-NEXT: ret i32 1 } -bool %test8(ubyte %A) { - %B = div ubyte %A, 123 - %C = seteq ubyte %B, 2 ; A >= 246 - ret bool %C -} - -bool %test9(ubyte %A) { - %B = div ubyte %A, 123 - %C = setne ubyte %B, 2 ; A < 246 - ret bool %C -} - -uint %test10(uint %X, bool %C) { - %V = select bool %C, uint 64, uint 8 - %R = udiv uint %X, %V - ret uint %R +define i32 @test13(i32 %x) nounwind { + %tmp3 = sdiv i32 %x, %x ; 1 + ret i32 %tmp3 +; CHECK-LABEL: @test13( +; CHECK-NEXT: ret i32 1 } -int %test11(int %X, bool %C) { - %A = select bool %C, int 1024, int 32 - %B = udiv int %X, %A - ret int %B +define i32 @test14(i8 %x) nounwind { + %zext = zext i8 %x to i32 + %div = udiv i32 %zext, 257 ; 0 + ret i32 %div +; CHECK-LABEL: @test14( +; CHECK-NEXT: ret i32 0 } + +; PR9814 +define i32 @test15(i32 %a, i32 %b) nounwind { + %shl = shl i32 1, %b + %div = lshr i32 %shl, 2 + %div2 = udiv i32 %a, %div + ret i32 %div2 +; CHECK-LABEL: @test15( +; CHECK-NEXT: add i32 %b, -2 +; CHECK-NEXT: lshr i32 %a, +; CHECK-NEXT: ret i32 +} + +