X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=utils%2FTableGen%2FCodeGenTarget.h;h=627144302932b605342cae4f1543ff4487cdec4c;hb=b3cabb44c32b5a3aba9b4d23aae9723d498ea7a9;hp=9bedb9ce4570b7b6f0bf7a47eb3eb0c9083fc860;hpb=abdbc84b4ed4276ed3def50f554e3ba156325717;p=oota-llvm.git diff --git a/utils/TableGen/CodeGenTarget.h b/utils/TableGen/CodeGenTarget.h index 9bedb9ce457..62714430293 100644 --- a/utils/TableGen/CodeGenTarget.h +++ b/utils/TableGen/CodeGenTarget.h @@ -9,23 +9,24 @@ // // This file defines wrappers for the Target class and related global // functionality. This makes it easier to access the data and provides a single -// place that needs to check it for validity. All of these classes throw -// exceptions on error conditions. +// place that needs to check it for validity. All of these classes abort +// on error conditions. // //===----------------------------------------------------------------------===// #ifndef CODEGEN_TARGET_H #define CODEGEN_TARGET_H -#include "CodeGenRegisters.h" #include "CodeGenInstruction.h" -#include "Record.h" +#include "CodeGenRegisters.h" #include "llvm/Support/raw_ostream.h" +#include "llvm/TableGen/Record.h" #include namespace llvm { struct CodeGenRegister; +class CodeGenSchedModels; class CodeGenTarget; // SelectionDAG node properties. @@ -66,13 +67,18 @@ class CodeGenTarget { mutable DenseMap Instructions; mutable CodeGenRegBank *RegBank; - mutable std::vector LegalValueTypes; + mutable std::vector RegAltNameIndices; + mutable SmallVector LegalValueTypes; + void ReadRegAltNameIndices() const; void ReadInstructions() const; void ReadLegalValueTypes() const; + mutable CodeGenSchedModels *SchedModels; + mutable std::vector InstrsByEnum; public: CodeGenTarget(RecordKeeper &Records); + ~CodeGenTarget(); Record *getTargetRecord() const { return TargetRec; } const std::string &getName() const; @@ -89,6 +95,16 @@ public: /// Record *getAsmParser() const; + /// getAsmParserVariant - Return the AssmblyParserVariant definition for + /// this target. + /// + Record *getAsmParserVariant(unsigned i) const; + + /// getAsmParserVariantCount - Return the AssmblyParserVariant definition + /// available for this target. + /// + unsigned getAsmParserVariantCount() const; + /// getAsmWriter - Return the AssemblyWriter definition for this target. /// Record *getAsmWriter() const; @@ -100,8 +116,9 @@ public: /// return it. const CodeGenRegister *getRegisterByName(StringRef Name) const; - const std::vector &getRegisterClasses() const { - return getRegBank().getRegClasses(); + const std::vector &getRegAltNameIndices() const { + if (RegAltNameIndices.empty()) ReadRegAltNameIndices(); + return RegAltNameIndices; } const CodeGenRegisterClass &getRegisterClass(Record *R) const { @@ -112,7 +129,7 @@ public: /// specified physical register. std::vector getRegisterVTs(Record *R) const; - const std::vector &getLegalValueTypes() const { + ArrayRef getLegalValueTypes() const { if (LegalValueTypes.empty()) ReadLegalValueTypes(); return LegalValueTypes; } @@ -120,12 +137,14 @@ public: /// isLegalValueType - Return true if the specified value type is natively /// supported by the target (i.e. there are registers that directly hold it). bool isLegalValueType(MVT::SimpleValueType VT) const { - const std::vector &LegalVTs = getLegalValueTypes(); + ArrayRef LegalVTs = getLegalValueTypes(); for (unsigned i = 0, e = LegalVTs.size(); i != e; ++i) if (LegalVTs[i] == VT) return true; return false; } + CodeGenSchedModels &getSchedModels() const; + private: DenseMap &getInstructions() const { if (Instructions.empty()) ReadInstructions(); @@ -158,6 +177,10 @@ public: /// bool isLittleEndianEncoding() const; + /// guessInstructionProperties - should we just guess unset instruction + /// properties? + bool guessInstructionProperties() const; + private: void ComputeInstrsByEnum() const; };