X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=utils%2FTableGen%2FFastISelEmitter.cpp;h=201a2cc5fef5c1ffef930fea5d8db059367858e7;hb=63e3e6350b14d04917268be07ca1c29e158fdfd7;hp=0aa9dfc49d4a3204efc6eb9cb083188840b21b57;hpb=98d2d07d416b3431a298eec5a2bfe8b39652c3aa;p=oota-llvm.git diff --git a/utils/TableGen/FastISelEmitter.cpp b/utils/TableGen/FastISelEmitter.cpp index 0aa9dfc49d4..201a2cc5fef 100644 --- a/utils/TableGen/FastISelEmitter.cpp +++ b/utils/TableGen/FastISelEmitter.cpp @@ -7,32 +7,14 @@ // //===----------------------------------------------------------------------===// // -// This tablegen backend emits a "fast" instruction selector. +// This tablegen backend emits code for use by the "fast" instruction +// selection algorithm. See the comments at the top of +// lib/CodeGen/SelectionDAG/FastISel.cpp for background. // -// This instruction selection method is designed to emit very poor code -// quickly. Also, it is not designed to do much lowering, so most illegal -// types (e.g. i64 on 32-bit targets) and operations (e.g. calls) are not -// supported and cannot easily be added. Blocks containing operations -// that are not supported need to be handled by a more capable selector, -// such as the SelectionDAG selector. +// This file scans through the target's tablegen instruction-info files +// and extracts instructions with obvious-looking patterns, and it emits +// code to look up these instructions by type and operator. // -// The intended use for "fast" instruction selection is "-O0" mode -// compilation, where the quality of the generated code is irrelevant when -// weighed against the speed at which the code can be generated. -// -// If compile time is so important, you might wonder why we don't just -// skip codegen all-together, emit LLVM bytecode files, and execute them -// with an interpreter. The answer is that it would complicate linking and -// debugging, and also because that isn't how a compiler is expected to -// work in some circles. -// -// If you need better generated code or more lowering than what this -// instruction selector provides, use the SelectionDAG (DAGISel) instruction -// selector instead. If you're looking here because SelectionDAG isn't fast -// enough, consider looking into improving the SelectionDAG infastructure -// instead. At the time of this writing there remain several major -// opportunities for improvement. -// //===----------------------------------------------------------------------===// #include "FastISelEmitter.h" @@ -89,7 +71,7 @@ struct OperandsSignature { for (unsigned i = 0, e = InstPatNode->getNumChildren(); i != e; ++i) { TreePatternNode *Op = InstPatNode->getChild(i); // For now, filter out any operand with a predicate. - if (!Op->getPredicateFn().empty()) + if (!Op->getPredicateFns().empty()) return false; // For now, filter out any operand with multiple values. if (Op->getExtTypes().size() != 1) @@ -327,7 +309,7 @@ void FastISelMap::CollectPatterns(CodeGenDAGPatterns &CGP) { continue; // For now, filter out any instructions with predicates. - if (!InstPatNode->getPredicateFn().empty()) + if (!InstPatNode->getPredicateFns().empty()) continue; // Check all the operands. @@ -458,7 +440,8 @@ void FastISelMap::PrintFunctionDefinitions(std::ostream &OS) { Operands.PrintArguments(OS, *Memo.PhysRegs); OS << ");\n"; } else { - OS << "extractsubreg(Op0, "; + OS << "extractsubreg(" << getName(RetVT); + OS << ", Op0, "; OS << (unsigned)Memo.SubRegNo; OS << ");\n"; } @@ -552,7 +535,7 @@ void FastISelMap::PrintFunctionDefinitions(std::ostream &OS) { Operands.PrintArguments(OS, *Memo.PhysRegs); OS << ");\n"; } else { - OS << "extractsubreg(Op0, "; + OS << "extractsubreg(RetVT, Op0, "; OS << (unsigned)Memo.SubRegNo; OS << ");\n"; }