X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=utils%2FTableGen%2FInstrInfoEmitter.h;h=abb1c6bc188cbd94e9ee7c15cb9ec6153dcdb0ea;hb=5d4314ef720630e6547fe41efec1608d4c14c78e;hp=400c0db16c699423b9c31aa97bf82bc89f2f7ded;hpb=bc01723605de979e67b1aea67385a029f851de34;p=oota-llvm.git diff --git a/utils/TableGen/InstrInfoEmitter.h b/utils/TableGen/InstrInfoEmitter.h index 400c0db16c6..abb1c6bc188 100644 --- a/utils/TableGen/InstrInfoEmitter.h +++ b/utils/TableGen/InstrInfoEmitter.h @@ -1,5 +1,12 @@ //===- InstrInfoEmitter.h - Generate a Instruction Set Desc. ----*- C++ -*-===// // +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// // This tablegen backend is responsible for emitting a description of the target // instruction set for the code generator. // @@ -9,26 +16,51 @@ #define INSTRINFO_EMITTER_H #include "TableGenBackend.h" +#include "CodeGenDAGPatterns.h" +#include +#include + +namespace llvm { + class StringInit; class IntInit; class ListInit; +class CodeGenInstruction; class InstrInfoEmitter : public TableGenBackend { RecordKeeper &Records; -public: - InstrInfoEmitter(RecordKeeper &R) : Records(R) {} + CodeGenDAGPatterns CDP; + std::map ItinClassMap; +public: + InstrInfoEmitter(RecordKeeper &R) : Records(R), CDP(R) { } + // run - Output the instruction set description, returning true on failure. - void run(std::ostream &OS); + void run(raw_ostream &OS); - // runEnums - Print out enum values for all of the instructions. - void runEnums(std::ostream &OS); private: - void printDefList(ListInit *LI, const std::string &Name, - std::ostream &OS) const; - void emitRecord(Record *R, unsigned Num, Record *InstrInfo, std::ostream &OS); - void emitShiftedValue(Record *R, StringInit *Val, IntInit *Shift, - std::ostream &OS); + typedef std::map, unsigned> OperandInfoMapTy; + + void emitRecord(const CodeGenInstruction &Inst, unsigned Num, + Record *InstrInfo, + std::map, unsigned> &EL, + std::map &BM, + const OperandInfoMapTy &OpInfo, + raw_ostream &OS); + + // Itinerary information. + void GatherItinClasses(); + unsigned getItinClassNumber(const Record *InstRec); + + // Operand information. + void EmitOperandInfo(raw_ostream &OS, OperandInfoMapTy &OperandInfoIDs); + std::vector GetOperandInfo(const CodeGenInstruction &Inst); + + void DetectRegisterClassBarriers(std::vector &Defs, + const std::vector &RCs, + std::vector &Barriers); }; +} // End llvm namespace + #endif