X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=utils%2FTableGen%2FInstrInfoEmitter.h;h=abb1c6bc188cbd94e9ee7c15cb9ec6153dcdb0ea;hb=5d4314ef720630e6547fe41efec1608d4c14c78e;hp=fe40b5803d7b7daf6aa5720ebd5f19cdd4fc7cda;hpb=7b11712ef2d41631137a3c124a58407702ffa8af;p=oota-llvm.git

diff --git a/utils/TableGen/InstrInfoEmitter.h b/utils/TableGen/InstrInfoEmitter.h
index fe40b5803d7..abb1c6bc188 100644
--- a/utils/TableGen/InstrInfoEmitter.h
+++ b/utils/TableGen/InstrInfoEmitter.h
@@ -16,6 +16,7 @@
 #define INSTRINFO_EMITTER_H
 
 #include "TableGenBackend.h"
+#include "CodeGenDAGPatterns.h"
 #include <vector>
 #include <map>
 
@@ -28,28 +29,36 @@ class CodeGenInstruction;
 
 class InstrInfoEmitter : public TableGenBackend {
   RecordKeeper &Records;
-  bool IsItineraries;
+  CodeGenDAGPatterns CDP;
   std::map<std::string, unsigned> ItinClassMap;
   
 public:
-  InstrInfoEmitter(RecordKeeper &R) : Records(R), IsItineraries(false) {}
+  InstrInfoEmitter(RecordKeeper &R) : Records(R), CDP(R) { }
 
   // run - Output the instruction set description, returning true on failure.
-  void run(std::ostream &OS);
+  void run(raw_ostream &OS);
 
 private:
-  void printDefList(const std::vector<Record*> &Uses, unsigned Num,
-                    std::ostream &OS) const;
+  typedef std::map<std::vector<std::string>, unsigned> OperandInfoMapTy;
+  
   void emitRecord(const CodeGenInstruction &Inst, unsigned Num,
                   Record *InstrInfo, 
                   std::map<std::vector<Record*>, unsigned> &EL,
-                  std::map<std::vector<std::string>, unsigned> &OpInfo,
-                  std::ostream &OS);
+                  std::map<Record*, unsigned> &BM,
+                  const OperandInfoMapTy &OpInfo,
+                  raw_ostream &OS);
+
+  // Itinerary information.
   void GatherItinClasses();
-  unsigned ItinClassNumber(std::string ItinName);
-  void emitShiftedValue(Record *R, StringInit *Val, IntInit *Shift,
-                        std::ostream &OS);
+  unsigned getItinClassNumber(const Record *InstRec);
+  
+  // Operand information.
+  void EmitOperandInfo(raw_ostream &OS, OperandInfoMapTy &OperandInfoIDs);
   std::vector<std::string> GetOperandInfo(const CodeGenInstruction &Inst);
+
+  void DetectRegisterClassBarriers(std::vector<Record*> &Defs,
+                                   const std::vector<CodeGenRegisterClass> &RCs,
+                                   std::vector<Record*> &Barriers);
 };
 
 } // End llvm namespace