X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=utils%2FTableGen%2FRegisterInfoEmitter.cpp;h=67d1cfcf4d3438bbf58054f7da011ae453fc4726;hb=0d52ff1f7b993750a74a5d4432273092de9af069;hp=d514bf7deb8fc02e5a7fb0ce9e1725cc9f855dae;hpb=22ae99908258dd5631fde7128a94c418ed08eae5;p=oota-llvm.git diff --git a/utils/TableGen/RegisterInfoEmitter.cpp b/utils/TableGen/RegisterInfoEmitter.cpp index d514bf7deb8..67d1cfcf4d3 100644 --- a/utils/TableGen/RegisterInfoEmitter.cpp +++ b/utils/TableGen/RegisterInfoEmitter.cpp @@ -114,9 +114,9 @@ bool isSubRegisterClass(const CodeGenRegisterClass &RC, } static void addSuperReg(Record *R, Record *S, - std::map > &SubRegs, - std::map > &SuperRegs, - std::map > &Aliases) { + std::map, LessRecord> &SubRegs, + std::map, LessRecord> &SuperRegs, + std::map, LessRecord> &Aliases) { if (R == S) { cerr << "Error: recursive sub-register relationship between" << " register " << getQualifiedName(R) @@ -135,9 +135,9 @@ static void addSuperReg(Record *R, Record *S, } static void addSubSuperReg(Record *R, Record *S, - std::map > &SubRegs, - std::map > &SuperRegs, - std::map > &Aliases) { + std::map, LessRecord> &SubRegs, + std::map, LessRecord> &SuperRegs, + std::map, LessRecord> &Aliases) { if (R == S) { cerr << "Error: recursive sub-register relationship between" << " register " << getQualifiedName(R) @@ -158,10 +158,10 @@ static void addSubSuperReg(Record *R, Record *S, class RegisterSorter { private: - std::map > &RegisterSubRegs; + std::map, LessRecord> &RegisterSubRegs; public: - RegisterSorter(std::map > &RS) + RegisterSorter(std::map, LessRecord> &RS) : RegisterSubRegs(RS) {}; bool operator()(Record *RegA, Record *RegB) { @@ -240,83 +240,7 @@ void RegisterInfoEmitter::run(std::ostream &OS) { << RegisterClasses[i].getName() << "RegClass;\n"; std::map > SuperClassMap; - std::map > SuperRegClassMap; OS << "\n"; - - // Emit the sub-register classes for each RegisterClass - for (unsigned rc = 0, e = RegisterClasses.size(); rc != e; ++rc) { - const CodeGenRegisterClass &RC = RegisterClasses[rc]; - - // Give the register class a legal C name if it's anonymous. - std::string Name = RC.TheDef->getName(); - - OS << " // " << Name - << " Sub-register Classess...\n" - << " static const TargetRegisterClass* const " - << Name << "SubRegClasses [] = {\n "; - - bool Empty = true; - - for (unsigned subrc = 0, subrcMax = RC.SubRegClasses.size(); - subrc != subrcMax; ++subrc) { - unsigned rc2 = 0, e2 = RegisterClasses.size(); - for (; rc2 != e2; ++rc2) { - const CodeGenRegisterClass &RC2 = RegisterClasses[rc2]; - if (RC.SubRegClasses[subrc]->getName() == RC2.getName()) { - if (!Empty) - OS << ", "; - OS << "&" << getQualifiedName(RC2.TheDef) << "RegClass"; - Empty = false; - - std::map >::iterator SCMI = - SuperRegClassMap.find(rc2); - if (SCMI == SuperRegClassMap.end()) { - SuperRegClassMap.insert(std::make_pair(rc2, std::set())); - SCMI = SuperRegClassMap.find(rc2); - } - SCMI->second.insert(rc); - break; - } - } - if (rc2 == e2) - throw "Register Class member '" + - RC.SubRegClasses[subrc]->getName() + - "' is not a valid RegisterClass!"; - } - - OS << (!Empty ? ", " : "") << "NULL"; - OS << "\n };\n\n"; - } - - // Emit the super-register classes for each RegisterClass - for (unsigned rc = 0, e = RegisterClasses.size(); rc != e; ++rc) { - const CodeGenRegisterClass &RC = RegisterClasses[rc]; - - // Give the register class a legal C name if it's anonymous. - std::string Name = RC.TheDef->getName(); - - OS << " // " << Name - << " Super-register Classess...\n" - << " static const TargetRegisterClass* const " - << Name << "SuperRegClasses [] = {\n "; - - bool Empty = true; - std::map >::iterator I = - SuperRegClassMap.find(rc); - if (I != SuperRegClassMap.end()) { - for (std::set::iterator II = I->second.begin(), - EE = I->second.end(); II != EE; ++II) { - const CodeGenRegisterClass &RC2 = RegisterClasses[*II]; - if (!Empty) - OS << ", "; - OS << "&" << getQualifiedName(RC2.TheDef) << "RegClass"; - Empty = false; - } - } - - OS << (!Empty ? ", " : "") << "NULL"; - OS << "\n };\n\n"; - } // Emit the sub-classes array for each RegisterClass for (unsigned rc = 0, e = RegisterClasses.size(); rc != e; ++rc) { @@ -398,8 +322,6 @@ void RegisterInfoEmitter::run(std::ostream &OS) { << RC.getName() + "VTs" << ", " << RC.getName() + "Subclasses" << ", " << RC.getName() + "Superclasses" << ", " - << RC.getName() + "SubRegClasses" << ", " - << RC.getName() + "SuperRegClasses" << ", " << RC.SpillSize/8 << ", " << RC.SpillAlignment/8 << ", " << RC.CopyCost << ", " @@ -418,11 +340,12 @@ void RegisterInfoEmitter::run(std::ostream &OS) { OS << " };\n"; // Emit register sub-registers / super-registers, aliases... - std::map > RegisterSubRegs; - std::map > RegisterSuperRegs; - std::map > RegisterAliases; + std::map, LessRecord> RegisterSubRegs; + std::map, LessRecord> RegisterSuperRegs; + std::map, LessRecord> RegisterAliases; std::map > > SubRegVectors; - std::map > DwarfRegNums; + typedef std::map, LessRecord> DwarfRegNumsMapTy; + DwarfRegNumsMapTy DwarfRegNums; const std::vector &Regs = Target.getRegisters(); @@ -546,7 +469,7 @@ void RegisterInfoEmitter::run(std::ostream &OS) { OS << " const unsigned Empty_AliasSet[] = { 0 };\n"; // Loop over all of the registers which have aliases, emitting the alias list // to memory. - for (std::map >::iterator + for (std::map, LessRecord >::iterator I = RegisterAliases.begin(), E = RegisterAliases.end(); I != E; ++I) { OS << " const unsigned " << I->first->getName() << "_AliasSet[] = { "; for (std::set::iterator ASI = I->second.begin(), @@ -562,7 +485,7 @@ void RegisterInfoEmitter::run(std::ostream &OS) { OS << " const unsigned Empty_SubRegsSet[] = { 0 };\n"; // Loop over all of the registers which have sub-registers, emitting the // sub-registers list to memory. - for (std::map >::iterator + for (std::map, LessRecord>::iterator I = RegisterSubRegs.begin(), E = RegisterSubRegs.end(); I != E; ++I) { OS << " const unsigned " << I->first->getName() << "_SubRegsSet[] = { "; std::vector SubRegsVector; @@ -583,7 +506,7 @@ void RegisterInfoEmitter::run(std::ostream &OS) { OS << " const unsigned Empty_SuperRegsSet[] = { 0 };\n"; // Loop over all of the registers which have super-registers, emitting the // super-registers list to memory. - for (std::map >::iterator + for (std::map, LessRecord >::iterator I = RegisterSuperRegs.begin(), E = RegisterSuperRegs.end(); I != E; ++I) { OS << " const unsigned " << I->first->getName() << "_SuperRegsSet[] = { "; @@ -654,16 +577,16 @@ void RegisterInfoEmitter::run(std::ostream &OS) { OS << "unsigned " << ClassName << "::getSubReg(unsigned RegNo, unsigned Index) const {\n" << " switch (RegNo) {\n" - << " default: abort(); break;\n"; + << " default:\n return 0;\n"; for (std::map > >::iterator I = SubRegVectors.begin(), E = SubRegVectors.end(); I != E; ++I) { OS << " case " << getQualifiedName(I->first) << ":\n"; OS << " switch (Index) {\n"; - OS << " default: abort(); break;\n"; + OS << " default: return 0;\n"; for (unsigned i = 0, e = I->second.size(); i != e; ++i) OS << " case " << (I->second)[i].first << ": return " << getQualifiedName((I->second)[i].second) << ";\n"; - OS << " }; break;\n"; + OS << " };\n" << " break;\n"; } OS << " };\n"; OS << " return 0;\n"; @@ -684,7 +607,7 @@ void RegisterInfoEmitter::run(std::ostream &OS) { unsigned maxLength = 0; for (unsigned i = 0, e = Registers.size(); i != e; ++i) { Record *Reg = Registers[i].TheDef; - std::vector RegNums = Reg->getValueAsListOfInts("DwarfNumbers"); + std::vector RegNums = Reg->getValueAsListOfInts("DwarfNumbers"); maxLength = std::max((size_t)maxLength, RegNums.size()); if (DwarfRegNums.count(Reg)) cerr << "Warning: DWARF numbers for register " << getQualifiedName(Reg) @@ -693,8 +616,8 @@ void RegisterInfoEmitter::run(std::ostream &OS) { } // Now we know maximal length of number list. Append -1's, where needed - for (std::map >::iterator - I = DwarfRegNums.begin(), E = DwarfRegNums.end(); I != E; ++I) + for (DwarfRegNumsMapTy::iterator + I = DwarfRegNums.begin(), E = DwarfRegNums.end(); I != E; ++I) for (unsigned i = I->second.size(), e = maxLength; i != e; ++i) I->second.push_back(-1); @@ -712,8 +635,11 @@ void RegisterInfoEmitter::run(std::ostream &OS) { << " default:\n" << " assert(0 && \"Invalid RegNum\");\n" << " return -1;\n"; + + // Sort by name to get a stable order. + - for (std::map >::iterator + for (DwarfRegNumsMapTy::iterator I = DwarfRegNums.begin(), E = DwarfRegNums.end(); I != E; ++I) { int RegNo = I->second[i]; if (RegNo != -2)