X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=utils%2FTableGen%2FRegisterInfoEmitter.cpp;h=96399a4d0525108053cd428bc1dc55b8f4d70e2f;hb=9977e521a634b85764562efd910a221f15ea3109;hp=c99bbd9e01ac5c3bc65274262cbe2cd39de55514;hpb=6f0ff1d578cfa333164e806c2290f02dd5ebebd1;p=oota-llvm.git diff --git a/utils/TableGen/RegisterInfoEmitter.cpp b/utils/TableGen/RegisterInfoEmitter.cpp index c99bbd9e01a..96399a4d052 100644 --- a/utils/TableGen/RegisterInfoEmitter.cpp +++ b/utils/TableGen/RegisterInfoEmitter.cpp @@ -25,7 +25,7 @@ using namespace llvm; // runEnums - Print out enum values for all of the registers. void RegisterInfoEmitter::runEnums(raw_ostream &OS) { - CodeGenTarget Target; + CodeGenTarget Target(Records); const std::vector &Registers = Target.getRegisters(); std::string Namespace = Registers[0].TheDef->getValueAsString("Namespace"); @@ -63,7 +63,7 @@ void RegisterInfoEmitter::runEnums(raw_ostream &OS) { void RegisterInfoEmitter::runHeader(raw_ostream &OS) { EmitSourceFileHeader("Register Information Header Fragment", OS); - CodeGenTarget Target; + CodeGenTarget Target(Records); const std::string &TargetName = Target.getName(); std::string ClassName = TargetName + "GenRegisterInfo"; @@ -82,6 +82,7 @@ void RegisterInfoEmitter::runHeader(raw_ostream &OS) { << " { return false; }\n" << " unsigned getSubReg(unsigned RegNo, unsigned Index) const;\n" << " unsigned getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const;\n" + << " unsigned composeSubRegIndices(unsigned, unsigned) const;\n" << "};\n\n"; const std::vector &RegisterClasses = @@ -95,7 +96,7 @@ void RegisterInfoEmitter::runHeader(raw_ostream &OS) { for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i) { if (i) OS << ",\n"; OS << " " << RegisterClasses[i].getName() << "RegClassID"; - OS << " = " << (i+1); + OS << " = " << i; } OS << "\n };\n\n"; @@ -118,16 +119,6 @@ void RegisterInfoEmitter::runHeader(raw_ostream &OS) { OS << "} // End llvm namespace \n"; } -bool isSubRegisterClass(const CodeGenRegisterClass &RC, - std::set &RegSet) { - for (unsigned i = 0, e = RC.Elements.size(); i != e; ++i) { - Record *Reg = RC.Elements[i]; - if (!RegSet.count(Reg)) - return false; - } - return true; -} - static void addSuperReg(Record *R, Record *S, std::map, LessRecord> &SubRegs, std::map, LessRecord> &SuperRegs, @@ -171,14 +162,28 @@ static void addSubSuperReg(Record *R, Record *S, addSubSuperReg(R, *I, SubRegs, SuperRegs, Aliases); } -// Map SubRegIndex -> Register -typedef std::map SubRegMap; -// Map Register -> SubRegMap -typedef std::map AllSubRegMap; +struct RegisterMaps { + // Map SubRegIndex -> Register + typedef std::map SubRegMap; + // Map Register -> SubRegMap + typedef std::map SubRegMaps; + + SubRegMaps SubReg; + SubRegMap &inferSubRegIndices(Record *Reg); + + // Composite SubRegIndex instances. + // Map (SubRegIndex,SubRegIndex) -> SubRegIndex + typedef DenseMap,Record*> CompositeMap; + CompositeMap Composite; + + // Compute SubRegIndex compositions after inferSubRegIndices has run on all + // registers. + void computeComposites(); +}; // Calculate all subregindices for Reg. Loopy subregs cause infinite recursion. -static SubRegMap &inferSubRegIndices(Record *Reg, AllSubRegMap &ASRM) { - SubRegMap &SRM = ASRM[Reg]; +RegisterMaps::SubRegMap &RegisterMaps::inferSubRegIndices(Record *Reg) { + SubRegMap &SRM = SubReg[Reg]; if (!SRM.empty()) return SRM; std::vector SubRegs = Reg->getValueAsListOfDefs("SubRegs"); @@ -191,7 +196,7 @@ static SubRegMap &inferSubRegIndices(Record *Reg, AllSubRegMap &ASRM) { if (!SRM.insert(std::make_pair(Indices[i], SubRegs[i])).second) throw "SubRegIndex " + Indices[i]->getName() + " appears twice in Register " + Reg->getName(); - inferSubRegIndices(SubRegs[i], ASRM); + inferSubRegIndices(SubRegs[i]); } // Keep track of inherited subregs and how they can be reached. @@ -202,7 +207,7 @@ static SubRegMap &inferSubRegIndices(Record *Reg, AllSubRegMap &ASRM) { // Clone inherited subregs. Here the order is important - earlier subregs take // precedence. for (unsigned i = 0, e = SubRegs.size(); i != e; ++i) { - SubRegMap &M = ASRM[SubRegs[i]]; + SubRegMap &M = SubReg[SubRegs[i]]; for (SubRegMap::iterator si = M.begin(), se = M.end(); si != se; ++si) if (!SRM.insert(*si).second) Orphans[si->second] = std::make_pair(Indices[i], si->first); @@ -226,8 +231,8 @@ static SubRegMap &inferSubRegIndices(Record *Reg, AllSubRegMap &ASRM) { DefInit *IdxInit = dynamic_cast(*di); if (!IdxInit || !IdxInit->getDef()->isSubClassOf("SubRegIndex")) throw "Invalid SubClassIndex in " + Pat->getAsString(); - SubRegMap::const_iterator ni = ASRM[R2].find(IdxInit->getDef()); - if (ni == ASRM[R2].end()) + SubRegMap::const_iterator ni = SubReg[R2].find(IdxInit->getDef()); + if (ni == SubReg[R2].end()) throw "Composite " + Pat->getAsString() + " refers to bad index in " + R2->getName(); R2 = ni->second; @@ -255,6 +260,62 @@ static SubRegMap &inferSubRegIndices(Record *Reg, AllSubRegMap &ASRM) { return SRM; } +void RegisterMaps::computeComposites() { + for (SubRegMaps::const_iterator sri = SubReg.begin(), sre = SubReg.end(); + sri != sre; ++sri) { + Record *Reg1 = sri->first; + const SubRegMap &SRM1 = sri->second; + for (SubRegMap::const_iterator i1 = SRM1.begin(), e1 = SRM1.end(); + i1 != e1; ++i1) { + Record *Idx1 = i1->first; + Record *Reg2 = i1->second; + // Ignore identity compositions. + if (Reg1 == Reg2) + continue; + // If Reg2 has no subregs, Idx1 doesn't compose. + if (!SubReg.count(Reg2)) + continue; + const SubRegMap &SRM2 = SubReg[Reg2]; + // Try composing Idx1 with another SubRegIndex. + for (SubRegMap::const_iterator i2 = SRM2.begin(), e2 = SRM2.end(); + i2 != e2; ++i2) { + std::pair IdxPair(Idx1, i2->first); + Record *Reg3 = i2->second; + // OK Reg1:IdxPair == Reg3. Find the index with Reg:Idx == Reg3. + for (SubRegMap::const_iterator i1d = SRM1.begin(), e1d = SRM1.end(); + i1d != e1d; ++i1d) { + // Ignore identity compositions. + if (Reg2 == Reg3) + continue; + if (i1d->second == Reg3) { + std::pair Ins = + Composite.insert(std::make_pair(IdxPair, i1d->first)); + // Conflicting composition? + if (!Ins.second && Ins.first->second != i1d->first) { + errs() << "Error: SubRegIndex " << getQualifiedName(Idx1) + << " and " << getQualifiedName(IdxPair.second) + << " compose ambiguously as " + << getQualifiedName(Ins.first->second) << " or " + << getQualifiedName(i1d->first) << "\n"; + abort(); + } + } + } + } + } + } + + // We don't care about the difference between (Idx1, Idx2) -> Idx2 and invalid + // compositions, so remove any mappings of that form. + for (CompositeMap::iterator i = Composite.begin(), e = Composite.end(); + i != e;) { + CompositeMap::iterator j = i; + ++i; + if (j->first.second == j->second) + Composite.erase(j); + } +} + class RegisterSorter { private: std::map, LessRecord> &RegisterSubRegs; @@ -272,7 +333,7 @@ public: // RegisterInfoEmitter::run - Main register file description emitter. // void RegisterInfoEmitter::run(raw_ostream &OS) { - CodeGenTarget Target; + CodeGenTarget Target(Records); EmitSourceFileHeader("Register Information Source Fragment", OS); OS << "namespace llvm {\n\n"; @@ -427,12 +488,6 @@ void RegisterInfoEmitter::run(raw_ostream &OS) { // Give the register class a legal C name if it's anonymous. std::string Name = RC.TheDef->getName(); - std::set RegSet; - for (unsigned i = 0, e = RC.Elements.size(); i != e; ++i) { - Record *Reg = RC.Elements[i]; - RegSet.insert(Reg); - } - OS << " // " << Name << " Register Class sub-classes...\n" << " static const TargetRegisterClass* const " @@ -442,21 +497,9 @@ void RegisterInfoEmitter::run(raw_ostream &OS) { for (unsigned rc2 = 0, e2 = RegisterClasses.size(); rc2 != e2; ++rc2) { const CodeGenRegisterClass &RC2 = RegisterClasses[rc2]; - // RC2 is a sub-class of RC if it is a valid replacement for any - // instruction operand where an RC register is required. It must satisfy - // these conditions: - // - // 1. All RC2 registers are also in RC. - // 2. The RC2 spill size must not be smaller that the RC spill size. - // 3. RC2 spill alignment must be compatible with RC. - // // Sub-classes are used to determine if a virtual register can be used // as an instruction operand, or if it must be copied first. - - if (rc == rc2 || RC2.Elements.size() > RC.Elements.size() || - (RC.SpillAlignment && RC2.SpillAlignment % RC.SpillAlignment) || - RC.SpillSize > RC2.SpillSize || !isSubRegisterClass(RC2, RegSet)) - continue; + if (rc == rc2 || !RC.hasSubClass(&RC2)) continue; if (!Empty) OS << ", "; OS << "&" << getQualifiedName(RC2.TheDef) << "RegClass"; @@ -734,17 +777,13 @@ void RegisterInfoEmitter::run(raw_ostream &OS) { delete [] AliasesHashTable; if (!RegisterAliases.empty()) - OS << "\n\n // Register Alias Sets...\n"; + OS << "\n\n // Register Overlap Lists...\n"; - // Emit the empty alias list - OS << " const unsigned Empty_AliasSet[] = { 0 };\n"; - // Loop over all of the registers which have aliases, emitting the alias list - // to memory. + // Emit an overlap list for all registers. for (std::map, LessRecord >::iterator I = RegisterAliases.begin(), E = RegisterAliases.end(); I != E; ++I) { - if (I->second.empty()) - continue; - OS << " const unsigned " << I->first->getName() << "_AliasSet[] = { "; + OS << " const unsigned " << I->first->getName() << "_Overlaps[] = { " + << getQualifiedName(I->first) << ", "; for (std::set::iterator ASI = I->second.begin(), E = I->second.end(); ASI != E; ++ASI) OS << getQualifiedName(*ASI) << ", "; @@ -806,11 +845,7 @@ void RegisterInfoEmitter::run(raw_ostream &OS) { for (unsigned i = 0, e = Regs.size(); i != e; ++i) { const CodeGenRegister &Reg = Regs[i]; OS << " { \""; - OS << Reg.getName() << "\",\t"; - if (!RegisterAliases[Reg.TheDef].empty()) - OS << Reg.getName() << "_AliasSet,\t"; - else - OS << "Empty_AliasSet,\t"; + OS << Reg.getName() << "\",\t" << Reg.getName() << "_Overlaps,\t"; if (!RegisterSubRegs[Reg.TheDef].empty()) OS << Reg.getName() << "_SubRegsSet,\t"; else @@ -836,7 +871,7 @@ void RegisterInfoEmitter::run(raw_ostream &OS) { std::string ClassName = Target.getName() + "GenRegisterInfo"; // Calculate the mapping of subregister+index pairs to physical registers. - AllSubRegMap AllSRM; + RegisterMaps RegMaps; // Emit the subregister + index mapping function based on the information // calculated above. @@ -845,14 +880,14 @@ void RegisterInfoEmitter::run(raw_ostream &OS) { << " switch (RegNo) {\n" << " default:\n return 0;\n"; for (unsigned i = 0, e = Regs.size(); i != e; ++i) { - SubRegMap &SRM = inferSubRegIndices(Regs[i].TheDef, AllSRM); + RegisterMaps::SubRegMap &SRM = RegMaps.inferSubRegIndices(Regs[i].TheDef); if (SRM.empty()) continue; OS << " case " << getQualifiedName(Regs[i].TheDef) << ":\n"; OS << " switch (Index) {\n"; OS << " default: return 0;\n"; - for (SubRegMap::const_iterator ii = SRM.begin(), ie = SRM.end(); ii != ie; - ++ii) + for (RegisterMaps::SubRegMap::const_iterator ii = SRM.begin(), + ie = SRM.end(); ii != ie; ++ii) OS << " case " << getQualifiedName(ii->first) << ": return " << getQualifiedName(ii->second) << ";\n"; OS << " };\n" << " break;\n"; @@ -866,12 +901,12 @@ void RegisterInfoEmitter::run(raw_ostream &OS) { << " switch (RegNo) {\n" << " default:\n return 0;\n"; for (unsigned i = 0, e = Regs.size(); i != e; ++i) { - SubRegMap &SRM = AllSRM[Regs[i].TheDef]; + RegisterMaps::SubRegMap &SRM = RegMaps.SubReg[Regs[i].TheDef]; if (SRM.empty()) continue; OS << " case " << getQualifiedName(Regs[i].TheDef) << ":\n"; - for (SubRegMap::const_iterator ii = SRM.begin(), ie = SRM.end(); ii != ie; - ++ii) + for (RegisterMaps::SubRegMap::const_iterator ii = SRM.begin(), + ie = SRM.end(); ii != ie; ++ii) OS << " if (SubRegNo == " << getQualifiedName(ii->second) << ") return " << getQualifiedName(ii->first) << ";\n"; OS << " return 0;\n"; @@ -879,7 +914,32 @@ void RegisterInfoEmitter::run(raw_ostream &OS) { OS << " };\n"; OS << " return 0;\n"; OS << "}\n\n"; - + + // Emit composeSubRegIndices + RegMaps.computeComposites(); + OS << "unsigned " << ClassName + << "::composeSubRegIndices(unsigned IdxA, unsigned IdxB) const {\n" + << " switch (IdxA) {\n" + << " default:\n return IdxB;\n"; + for (unsigned i = 0, e = SubRegIndices.size(); i != e; ++i) { + bool Open = false; + for (unsigned j = 0; j != e; ++j) { + if (Record *Comp = RegMaps.Composite.lookup( + std::make_pair(SubRegIndices[i], SubRegIndices[j]))) { + if (!Open) { + OS << " case " << getQualifiedName(SubRegIndices[i]) + << ": switch(IdxB) {\n default: return IdxB;\n"; + Open = true; + } + OS << " case " << getQualifiedName(SubRegIndices[j]) + << ": return " << getQualifiedName(Comp) << ";\n"; + } + } + if (Open) + OS << " }\n"; + } + OS << " }\n}\n\n"; + // Emit the constructor of the class... OS << ClassName << "::" << ClassName << "(int CallFrameSetupOpcode, int CallFrameDestroyOpcode)\n"