X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=utils%2FTableGen%2FTableGen.cpp;h=98a188ed837189452fb177cf82cc446535e4440c;hb=d24479730a8790d82c4859dc477bc2416d7a6bda;hp=4345234c275a45bc2d622821f7cf35eeac678ec8;hpb=53c9b3f68c74c6ea4d739bb268e5fc5b495adff3;p=oota-llvm.git diff --git a/utils/TableGen/TableGen.cpp b/utils/TableGen/TableGen.cpp index 4345234c275..98a188ed837 100644 --- a/utils/TableGen/TableGen.cpp +++ b/utils/TableGen/TableGen.cpp @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file was developed by the LLVM research group and is distributed under -// the University of Illinois Open Source License. See LICENSE.TXT for details. +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // @@ -16,17 +16,23 @@ //===----------------------------------------------------------------------===// #include "Record.h" +#include "TGParser.h" #include "llvm/Support/CommandLine.h" #include "llvm/Support/Streams.h" #include "llvm/System/Signals.h" #include "llvm/Support/FileUtilities.h" +#include "llvm/Support/MemoryBuffer.h" +#include "CallingConvEmitter.h" #include "CodeEmitterGen.h" #include "RegisterInfoEmitter.h" #include "InstrInfoEmitter.h" +#include "InstrEnumEmitter.h" #include "AsmWriterEmitter.h" #include "DAGISelEmitter.h" +#include "FastISelEmitter.h" #include "SubtargetEmitter.h" #include "IntrinsicEmitter.h" +#include "LLVMCConfigurationEmitter.h" #include #include #include @@ -37,10 +43,14 @@ enum ActionType { PrintRecords, GenEmitter, GenRegisterEnums, GenRegister, GenRegisterHeader, - GenInstrEnums, GenInstrs, GenAsmWriter, + GenInstrEnums, GenInstrs, GenAsmWriter, + GenCallingConv, GenDAGISel, + GenFastISel, GenSubtarget, GenIntrinsic, + GenTgtIntrinsic, + GenLLVMCConf, PrintEnums }; @@ -61,14 +71,22 @@ namespace { "Generate enum values for instructions"), clEnumValN(GenInstrs, "gen-instr-desc", "Generate instruction descriptions"), + clEnumValN(GenCallingConv, "gen-callingconv", + "Generate calling convention descriptions"), clEnumValN(GenAsmWriter, "gen-asm-writer", "Generate assembly writer"), clEnumValN(GenDAGISel, "gen-dag-isel", "Generate a DAG instruction selector"), + clEnumValN(GenFastISel, "gen-fast-isel", + "Generate a \"fast\" instruction selector"), clEnumValN(GenSubtarget, "gen-subtarget", "Generate subtarget enumerations"), clEnumValN(GenIntrinsic, "gen-intrinsic", "Generate intrinsic information"), + clEnumValN(GenTgtIntrinsic, "gen-tgt-intrinsic", + "Generate target intrinsic information"), + clEnumValN(GenLLVMCConf, "gen-llvmc", + "Generate LLVMC configuration library"), clEnumValN(PrintEnums, "print-enums", "Print enum values for a class"), clEnumValEnd)); @@ -89,16 +107,34 @@ namespace { cl::value_desc("directory"), cl::Prefix); } -namespace llvm { - void ParseFile(const std::string &Filename, - const std::vector &IncludeDirs); -} - RecordKeeper llvm::Records; +/// ParseFile - this function begins the parsing of the specified tablegen +/// file. +static bool ParseFile(const std::string &Filename, + const std::vector &IncludeDirs) { + std::string ErrorStr; + MemoryBuffer *F = MemoryBuffer::getFileOrSTDIN(Filename.c_str(), &ErrorStr); + if (F == 0) { + cerr << "Could not open input file '" + Filename + "': " << ErrorStr <<"\n"; + return true; + } + + TGParser Parser(F); + + // Record the location of the include directory so that the lexer can find + // it later. + Parser.setIncludeDirs(IncludeDirs); + + return Parser.ParseFile(); +} + int main(int argc, char **argv) { cl::ParseCommandLineOptions(argc, argv); - ParseFile(InputFilename, IncludeDirs); + + // Parse the input file. + if (ParseFile(InputFilename, IncludeDirs)) + return 1; std::ostream *Out = cout.stream(); if (OutputFilename != "-") { @@ -133,12 +169,14 @@ int main(int argc, char **argv) { break; case GenInstrEnums: - InstrInfoEmitter(Records).runEnums(*Out); + InstrEnumEmitter(Records).run(*Out); break; case GenInstrs: InstrInfoEmitter(Records).run(*Out); break; - + case GenCallingConv: + CallingConvEmitter(Records).run(*Out); + break; case GenAsmWriter: AsmWriterEmitter(Records).run(*Out); break; @@ -146,12 +184,21 @@ int main(int argc, char **argv) { case GenDAGISel: DAGISelEmitter(Records).run(*Out); break; + case GenFastISel: + FastISelEmitter(Records).run(*Out); + break; case GenSubtarget: SubtargetEmitter(Records).run(*Out); break; case GenIntrinsic: IntrinsicEmitter(Records).run(*Out); break; + case GenTgtIntrinsic: + IntrinsicEmitter(Records, true).run(*Out); + break; + case GenLLVMCConf: + LLVMCConfigurationEmitter(Records).run(*Out); + break; case PrintEnums: { std::vector Recs = Records.getAllDerivedDefinitions(Class); @@ -171,6 +218,13 @@ int main(int argc, char **argv) { std::remove(OutputFilename.c_str()); // Remove the file, it's broken } return 1; + } catch (const char *Error) { + cerr << argv[0] << ": " << Error << "\n"; + if (Out != cout.stream()) { + delete Out; // Close the file + std::remove(OutputFilename.c_str()); // Remove the file, it's broken + } + return 1; } catch (...) { cerr << argv[0] << ": Unknown unexpected exception occurred.\n"; if (Out != cout.stream()) {