[CodeGenPrepare] Create more extloads and fewer ands
authorGeoff Berry <gberry@codeaurora.org>
Fri, 20 Nov 2015 22:34:39 +0000 (22:34 +0000)
committerGeoff Berry <gberry@codeaurora.org>
Fri, 20 Nov 2015 22:34:39 +0000 (22:34 +0000)
commit2d2aadfa70bf12d899f0b78b125ac1a6b2a53965
tree01d490440acb9d76decde8fd6cf6482780dc7621
parentd43d18c48b1cf569a214e7fbc72a7fa1259263ba
[CodeGenPrepare] Create more extloads and fewer ands

Summary:
Add and instructions immediately after loads that only have their low
bits used, assuming that the (and (load x) c) will be matched as a
extload and the ands/truncs fed by the extload will be removed by isel.

Reviewers: mcrosier, qcolombet, ab

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D14584

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253722 91177308-0d34-0410-b5e6-96231b3b80d8
lib/CodeGen/CodeGenPrepare.cpp
test/CodeGen/AArch64/free-zext.ll
test/Transforms/CodeGenPrepare/free-zext.ll [new file with mode: 0644]