Scalarizer for masked load and store intrinsics.
authorElena Demikhovsky <elena.demikhovsky@intel.com>
Sun, 28 Dec 2014 08:54:45 +0000 (08:54 +0000)
committerElena Demikhovsky <elena.demikhovsky@intel.com>
Sun, 28 Dec 2014 08:54:45 +0000 (08:54 +0000)
commit8499a501e4381f8afd654eff0001e1ad4dc7bc09
tree30810d0cf870c3b5a8cc95aef239b093eb8d140f
parent04c853b26927b29ed61c66ddecfed2824ca216fe
Scalarizer for masked load and store intrinsics.

Masked vector intrinsics are a part of common LLVM IR, but they are really supported on AVX2 and AVX-512 targets. I added a code that translates masked intrinsic for all other targets. The masked vector intrinsic is converted to a chain of scalar operations inside conditional basic blocks.

http://reviews.llvm.org/D6436

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224897 91177308-0d34-0410-b5e6-96231b3b80d8
lib/CodeGen/CodeGenPrepare.cpp
test/CodeGen/X86/masked_memop.ll