[SLP] Try a bit harder to find reduction PHIs
authorCharlie Turner <charlie.turner@arm.com>
Tue, 27 Oct 2015 17:54:16 +0000 (17:54 +0000)
committerCharlie Turner <charlie.turner@arm.com>
Tue, 27 Oct 2015 17:54:16 +0000 (17:54 +0000)
commit751d6ddd6dfeb0e66663c678080d0a10383f427d
treee0f96549aee92a173ec3e372529468d27ba489ff
parentb13834ec71c909cd403aa153ad5d4d04c13b0f04
[SLP] Try a bit harder to find reduction PHIs

Summary:
Currently, when the SLP vectorizer considers whether a phi is part of a reduction, it dismisses phi's whose incoming blocks are not the same as the block containing the phi. For the patterns I'm looking at, extending this rule to allow phis whose incoming block is a containing loop latch allows me to vectorize certain workloads.

There is no significant compile-time impact, and combined with D13949, no performance improvement measured in ARM/AArch64 in any of SPEC2000, SPEC2006 or LNT.

Reviewers: jmolloy, mcrosier, nadav

Subscribers: mssimpso, nadav, aemerson, llvm-commits

Differential Revision: http://reviews.llvm.org/D14063

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251425 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Transforms/Vectorize/SLPVectorizer.cpp
test/Transforms/SLPVectorizer/AArch64/horizontal.ll