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(parent: 4f8ff16) | patch
64-bit SSSE3 ops that use MMX registers don't require 16-byte alignment.
authorBill Wendling <isanbard@gmail.com>
Sat, 11 Aug 2007 09:52:53 +0000 (09:52 +0000)
committerBill Wendling <isanbard@gmail.com>
Sat, 11 Aug 2007 09:52:53 +0000 (09:52 +0000)
commit01284b4d55a72e58171dd962b75c73fa47c9ab32
tree33c281c9ce407223791a59bf47c755ba0f4ceb07tree | snapshot
parent4f8ff168de12eabdeb4b9437bf9402489ecf85cbcommit | diff
64-bit SSSE3 ops that use MMX registers don't require 16-byte alignment.
Make a 'memop' pattern just for them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41017 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86InstrSSE.td diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors