SelectionDAGDumper: Print simple operands inline.
authorMatthias Braun <matze@braunis.de>
Fri, 25 Sep 2015 22:27:02 +0000 (22:27 +0000)
committerMatthias Braun <matze@braunis.de>
Fri, 25 Sep 2015 22:27:02 +0000 (22:27 +0000)
commit014636709b212e93f67c4d9d9844325adbf7b1eb
tree624ff39041bfc63e0f97f1b43faa7b8914d16048
parent728cde2865815411056bed202befbe86bb81628d
SelectionDAGDumper: Print simple operands inline.

Print simple operands inline instead of their pointer/value number.
Simple operands are SDNodes without predecessors like Constant(FP), Register,
UNDEF. This unifies the behaviour with dumpr() which was already doing this.

Previously:
  t0: ch = EntryToken
    t1: i64 = Register %vreg0
  t2: i64,ch = CopyFromReg t0, t1
    t3: i64 = Constant<1>
  t4: i64 = add t2, t3
    t5: i64 = Constant<2>
  t6: i64 = add t2, t5
  t10: i64 = undef
  t11: i8,ch = load t0, t2, t10<LD1[%tmp81]>
  t12: i8,ch = load t0, t4, t10<LD1[%tmp10]>
  t13: i8,ch = load t0, t6, t10<LD1[%tmp12]>

Now:
  t0: ch = EntryToken
  t2: i64,ch = CopyFromReg t0, Register:i64 %vreg0
  t4: i64 = add t2, Constant:i64<1>
  t6: i64 = add t2, Constant:i64<2>
  t11: i8,ch = load<LD1[%tmp81]> t0, t2, undef:i64
  t12: i8,ch = load<LD1[%tmp10]> t0, t4, undef:i64
  t13: i8,ch = load<LD1[%tmp12]> t0, t6, undef:i64

Differential Revision: http://reviews.llvm.org/D12567

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248628 91177308-0d34-0410-b5e6-96231b3b80d8
lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
test/CodeGen/X86/merge-store-partially-alias-loads.ll