Add CLAC/STAC instruction encoding/decoding support
authorMichael Liao <michael.liao@intel.com>
Thu, 11 Apr 2013 04:52:28 +0000 (04:52 +0000)
committerMichael Liao <michael.liao@intel.com>
Thu, 11 Apr 2013 04:52:28 +0000 (04:52 +0000)
commit02d2e612521954b5ff7c1ba6fd53e36bc51e1c48
treeaf6fc7afc6bc91ff6926a48e7819b9538dc1bf68
parent959ddbb5e0e088f4d5c3f8c015de3caf0baa6e6c
Add CLAC/STAC instruction encoding/decoding support

As these two instructions in AVX extension are privileged instructions for
special purpose, it's only expected to be used in inlined assembly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179266 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/MCTargetDesc/X86BaseInfo.h
lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
lib/Target/X86/X86CodeEmitter.cpp
lib/Target/X86/X86InstrFormats.td
lib/Target/X86/X86InstrSystem.td
test/MC/Disassembler/X86/x86-64.txt
test/MC/X86/x86-64.s
utils/TableGen/X86RecognizableInstr.cpp