- Start moving target-dependent nodes that could be represented by an
authorScott Michel <scottm@aero.org>
Tue, 30 Dec 2008 23:28:25 +0000 (23:28 +0000)
committerScott Michel <scottm@aero.org>
Tue, 30 Dec 2008 23:28:25 +0000 (23:28 +0000)
commit02d711b93e3e0d2f0dae278360abe35305913e23
tree8e85a3e48020ea52de566e67942de5b319c180fd
parent998dee96d3ca506cf73a617c0b7fc7f0e467a127
- Start moving target-dependent nodes that could be represented by an
  instruction sequence and cannot ordinarily be simplified by DAGcombine
  into the various target description files or SPUDAGToDAGISel.cpp.

  This makes some 64-bit operations legal.

- Eliminate target-dependent ISD enums.

- Update tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61508 91177308-0d34-0410-b5e6-96231b3b80d8
15 files changed:
lib/Target/CellSPU/SPU.td
lib/Target/CellSPU/SPU64InstrInfo.td
lib/Target/CellSPU/SPUISelDAGToDAG.cpp
lib/Target/CellSPU/SPUISelLowering.cpp
lib/Target/CellSPU/SPUISelLowering.h
lib/Target/CellSPU/SPUInstrInfo.cpp
lib/Target/CellSPU/SPUInstrInfo.td
lib/Target/CellSPU/SPUMathInstr.td [new file with mode: 0644]
lib/Target/CellSPU/SPUNodes.td
lib/Target/CellSPU/SPURegisterInfo.cpp
test/CodeGen/CellSPU/fdiv.ll
test/CodeGen/CellSPU/i64ops.ll
test/CodeGen/CellSPU/mul_ops.ll
test/CodeGen/CellSPU/shift_ops.ll
test/CodeGen/CellSPU/useful-harnesses/i64operations.c