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[mips] Correct .MIPS.abiflags for -mfpxx on MIPS32r6
authorDaniel Sanders <daniel.sanders@imgtec.com>
Thu, 17 Jul 2014 09:57:23 +0000 (09:57 +0000)
committerDaniel Sanders <daniel.sanders@imgtec.com>
Thu, 17 Jul 2014 09:57:23 +0000 (09:57 +0000)
commit0a342e99929a8eec77f23960f4d7ec6a8daf1472
tree715de9de21aaf587af971960c13ab99530aea48ctree | snapshot
parent4b5e7542df8563beb97407317e857439fa7544c8commit | diff
[mips] Correct .MIPS.abiflags for -mfpxx on MIPS32r6

Summary:
The cpr1_size field describes the minimum register width to run the program
rather than the size of the registers on the target. MIPS32r6 was acting
as if -mfp64 has been given because it starts off with 64-bit FPU registers.

Differential Revision: http://reviews.llvm.org/D4538

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213243 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Mips/MCTargetDesc/MipsABIFlagsSection.cpp diff | blob | history
lib/Target/Mips/MCTargetDesc/MipsABIFlagsSection.h diff | blob | history
test/MC/Mips/mips_abi_flags_xx.s diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors