Allocate the RS spill slot for any PPC function with spills and a large stack frame
authorHal Finkel <hfinkel@anl.gov>
Fri, 15 Mar 2013 05:06:04 +0000 (05:06 +0000)
committerHal Finkel <hfinkel@anl.gov>
Fri, 15 Mar 2013 05:06:04 +0000 (05:06 +0000)
commit0cfb42adb5072fb19a01dba3ea58a33fd5927947
tree10dabd9db4af644892adfbb84017e89c87c5308c
parentc6aa8348363c67d6ef1fac87e1d933742bf41403
Allocate the RS spill slot for any PPC function with spills and a large stack frame

For spills into a large stack frame, the FI-elimination code uses the register
scavenger to obtain a free GPR for use with an r+r-addressed load or store.
When there are no available GPRs, the scavenger gets one by using its spill
slot. Previously, we were not always allocating that spill slot and the RS
would assert when the spill slot was needed.

I don't currently have a small test that triggered the assert, but I've
created a small regression test that verifies that the spill slot is now
added when the stack frame is sufficiently large.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177140 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/PowerPC/PPCFrameLowering.cpp
lib/Target/PowerPC/PPCFrameLowering.h
lib/Target/PowerPC/PPCInstrInfo.cpp
lib/Target/PowerPC/PPCMachineFunctionInfo.h
test/CodeGen/PowerPC/2010-02-12-saveCR.ll
test/CodeGen/PowerPC/frame-size.ll [new file with mode: 0644]