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[mips][FastISel] Fix generated code for IR's select instruction.
authorVasileios Kalintiris <Vasileios.Kalintiris@imgtec.com>
Tue, 28 Jul 2015 19:57:25 +0000 (19:57 +0000)
committerVasileios Kalintiris <Vasileios.Kalintiris@imgtec.com>
Tue, 28 Jul 2015 19:57:25 +0000 (19:57 +0000)
commit0ed54d8a2faaae94a9fb4e29afed75a8ab599da0
treeff392608c75951359f3feaacde9369c49e87c9b0tree | snapshot
parent8ae1a0f7895286c7435ffc0519c830f480266d5ecommit | diff
[mips][FastISel] Fix generated code for IR's select instruction.

Summary:
Generate correct code for the select instruction by zero-extending
it's boolean/condition operand to GPR-width. This is necessary because
the conditional-move instructions operate on the whole register.

Reviewers: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11506

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243469 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Mips/MipsFastISel.cpp diff | blob | history
test/CodeGen/Mips/Fast-ISel/sel1.ll diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors