[NVPTX] Implement fma and imad contraction as target DAGCombiner patterns
authorJustin Holewinski <jholewinski@nvidia.com>
Fri, 27 Jun 2014 18:35:37 +0000 (18:35 +0000)
committerJustin Holewinski <jholewinski@nvidia.com>
Fri, 27 Jun 2014 18:35:37 +0000 (18:35 +0000)
commit10da1651ed7428b35ee89e0dc72ec177bf7041aa
tree2818dd545daae6db38c2d6cd295b7de2b061e262
parent508c80f11f2f52f549caf86f9f6e07d07cea6006
[NVPTX] Implement fma and imad contraction as target DAGCombiner patterns

This also introduces DAGCombiner patterns for mul.wide to multiply two smaller integers and produce a larger integer

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211935 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
lib/Target/NVPTX/NVPTXISelLowering.cpp
lib/Target/NVPTX/NVPTXISelLowering.h
lib/Target/NVPTX/NVPTXInstrInfo.td
test/CodeGen/NVPTX/imad.ll [new file with mode: 0644]
test/CodeGen/NVPTX/mulwide.ll [new file with mode: 0644]