crypto: aesni-intel - Add AES-NI accelerated CTR mode
authorHuang Ying <ying.huang@intel.com>
Wed, 10 Mar 2010 10:28:55 +0000 (18:28 +0800)
committerHerbert Xu <herbert@gondor.apana.org.au>
Wed, 10 Mar 2010 10:28:55 +0000 (18:28 +0800)
commit12387a46bb150f5608de4aa9a90dfdddbf991e3f
treea840b4a5da93cc3658eeb2477e47f402d0c77e28
parent269ab459da46ae37979a0d16307d1fcaa05600b2
crypto: aesni-intel - Add AES-NI accelerated CTR mode

To take advantage of the hardware pipeline implementation of AES-NI
instructions. CTR mode cryption is implemented in ASM to schedule
multiple AES-NI instructions one after another. This way, some latency
of AES-NI instruction can be eliminated.

Performance testing based on dm-crypt should 50% reduction of
ecryption/decryption time.

Signed-off-by: Huang Ying <ying.huang@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
arch/x86/crypto/aesni-intel_asm.S
arch/x86/crypto/aesni-intel_glue.c