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(parent: a16e3ad) | patch
AMDGPU: Add cache invalidation instructions.
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Thu, 24 Sep 2015 19:52:21 +0000 (19:52 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Thu, 24 Sep 2015 19:52:21 +0000 (19:52 +0000)
commit1348e9d04d0b29a511efedaa0016a17c86c7bcf7
tree5f65a5c8d7fc01c55dbf7a7ef66a08943382c867tree | snapshot
parenta16e3ad6daee6bc39df508362ee36f858f6c4f99commit | diff
AMDGPU: Add cache invalidation instructions.

These are necessary for implementing mem_fence for
OpenCL 2.0.

The VI assembler tests are disabled since it seems to be
using the wrong encoding or opcode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248532 91177308-0d34-0410-b5e6-96231b3b80d8
include/llvm/IR/IntrinsicsAMDGPU.td diff | blob | history
lib/Target/AMDGPU/CIInstructions.td diff | blob | history
lib/Target/AMDGPU/SIInstrInfo.td diff | blob | history
lib/Target/AMDGPU/SIInstructions.td diff | blob | history
test/CodeGen/AMDGPU/llvm.amdgcn.buffer.wbinvl1.ll [new file with mode: 0644] blob
test/CodeGen/AMDGPU/llvm.amdgcn.buffer.wbinvl1.sc.ll [new file with mode: 0644] blob
test/CodeGen/AMDGPU/llvm.amdgcn.buffer.wbinvl1.vol.ll [new file with mode: 0644] blob
test/MC/AMDGPU/buffer_wbinv1l_vol_vi.s [new file with mode: 0644] blob
test/MC/AMDGPU/mubuf.s diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors