drm/radeon: rework crtc pll setup to better support PPLL sharing
authorAlex Deucher <alexander.deucher@amd.com>
Thu, 13 Sep 2012 14:56:16 +0000 (10:56 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 20 Sep 2012 17:10:44 +0000 (13:10 -0400)
commit19eca43e5a52a8e47fdd40e940912b2417c7c055
tree9ca6f599f97728f13be6f4abe81829973d1c302a
parent2f454cf1261ba913e2f660b7555864b340502c60
drm/radeon: rework crtc pll setup to better support PPLL sharing

We need the calculate the pixel clock before allocating a PPLL
in order to insure the clocks really match.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/radeon/atombios_crtc.c
drivers/gpu/drm/radeon/radeon_mode.h