Programming Languages Research Group: Git

author	Vasileios Kalintiris <Vasileios.Kalintiris@imgtec.com>
	Mon, 20 Jul 2015 12:28:56 +0000 (12:28 +0000)
committer	Vasileios Kalintiris <Vasileios.Kalintiris@imgtec.com>
	Mon, 20 Jul 2015 12:28:56 +0000 (12:28 +0000)
commit	1a71ee21d38ce593ec3f0e63a5d5f167e85d106c
tree	6b3a89c5d99ea695e7d8cc13a94c56131bfc4033	tree \| snapshot
parent	fa1a4b2275a4419dd575c229e842d9162ae7cb84	commit \| diff

[mips] Added support for the ERETNC instruction.

Summary: This required adding the instruction predicate HasMips32r5.

Patch by Scott Egerton.

Reviewers: dsanders, vkalintiris

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11136

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242666 91177308-0d34-0410-b5e6-96231b3b80d8

17 files changed:

lib/Target/Mips/MipsInstrFormats.td		diff \| blob \| history
lib/Target/Mips/MipsInstrInfo.td		diff \| blob \| history
lib/Target/Mips/MipsSubtarget.h		diff \| blob \| history
test/MC/Disassembler/Mips/mips32r5/valid-mips32r5.txt		diff \| blob \| history
test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt		diff \| blob \| history
test/MC/Disassembler/Mips/mips64r5/valid-mips64r5.txt		diff \| blob \| history
test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt		diff \| blob \| history
test/MC/Mips/mips32r5/invalid-mips32.s	[new file with mode: 0644]	blob
test/MC/Mips/mips32r5/invalid-mips32r2.s	[new file with mode: 0644]	blob
test/MC/Mips/mips32r5/invalid-mips32r3.s	[new file with mode: 0644]	blob
test/MC/Mips/mips32r5/valid.s		diff \| blob \| history
test/MC/Mips/mips32r6/valid.s		diff \| blob \| history
test/MC/Mips/mips64r5/invalid-mips64.s	[new file with mode: 0644]	blob
test/MC/Mips/mips64r5/invalid-mips64r2.s	[new file with mode: 0644]	blob
test/MC/Mips/mips64r5/invalid-mips64r3.s	[new file with mode: 0644]	blob
test/MC/Mips/mips64r5/valid.s		diff \| blob \| history
test/MC/Mips/mips64r6/valid.s		diff \| blob \| history

C/C++ LLVM-based compilers that forbids OOTA behaviors

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