drm/i915: Revert workaround for disabling L3 cache aging on IVB
authorChris Wilson <chris@chris-wilson.co.uk>
Fri, 14 Feb 2014 22:34:43 +0000 (22:34 +0000)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 5 Mar 2014 20:30:02 +0000 (21:30 +0100)
commit1af8452f1644acdef85a587c5e8264807f9b83a8
tree5f79ae658583bcc66c90decd89f30b38f418aa48
parent47e74f0fd12dca6981cbcbdd710899867115c692
drm/i915: Revert workaround for disabling L3 cache aging on IVB

In commit e4e0c058a19c41150d12ad2d3023b3cf09c5de67
Author: Eugeni Dodonov <eugeni.dodonov@intel.com>
Date:   Wed Feb 8 12:53:50 2012 -0800

    drm/i915: gen7: Implement an L3 caching workaround.

the L3 cache aging was disabled. This was part of a shotgun response
to a number of GPU hang bugs, but there appears to be no documentation
to suggest that disabling the L3 cache age was ever required (to prevent
the GPU hangs).

Restoring the L3 cache age is a minor performance win of around 2%
on IVB:GT2. (Note that this value seems to be consistent across a number
of tests and so appears to be above the usual noise.)

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_reg.h