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ARM: tegra: common: Reduce sclk to 120 MHz
authorColin Cross <ccross@android.com>
Wed, 3 Nov 2010 18:42:20 +0000 (11:42 -0700)
committerColin Cross <ccross@android.com>
Fri, 5 Nov 2010 01:08:50 +0000 (18:08 -0700)
commit1b26bfc7ad7810c499b8b6d64e9a8293aa46b8d1
tree9f096aa42b619ea325ef4b74070230ab136fd2b4tree | snapshot
parentf0c185334383d9c65977a820acd06ecadaf3a070commit | diff
ARM: tegra: common: Reduce sclk to 120 MHz

Set pll_m_out1, sclk, and hclk to 120 MHz, and pclk to 60 MHz.
Drivers that require a faster bus speed can use a shared bus clock
reference to increase the sclk frequency up to 240 MHz, which will
also increase pll_m_out1, hclk, and pclk.

Change-Id: Ic491da80de1d95e6550cf9351eae185210f55b2a
Signed-off-by: Colin Cross <ccross@android.com>
arch/arm/mach-tegra/common.c diff | blob | history
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