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Bug 18149: [AArch32] VSel instructions has no ARMCC field
authorWeiming Zhao <weimingz@codeaurora.org>
Fri, 6 Dec 2013 17:56:48 +0000 (17:56 +0000)
committerWeiming Zhao <weimingz@codeaurora.org>
Fri, 6 Dec 2013 17:56:48 +0000 (17:56 +0000)
commit1c6611db444c8e43d2b1dc9abe9ddf938e8bc09d
treec24368e94bd53397afc0922e2a05f7dd08968b9ftree | snapshot
parentc008152a39a73188e0b21d25f225859d76e171eacommit | diff
Bug 18149: [AArch32] VSel instructions has no ARMCC field

The current peephole optimizing for compare inst assumes an instr that
uses CPSR has an MO for ARM Cond code.However, for VSEL instructions
(vseqeq, vselgt, vselgt, vselvs), there is no such operand nor do
they support the modification of Cond Code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196588 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARMBaseInstrInfo.cpp diff | blob | history
test/CodeGen/ARM/sub-cmp-peephole.ll diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors