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(parent: 1ac6c45) | patch
Support REG_SEQUENCE in tablegen.
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Sun, 2 Nov 2014 23:46:51 +0000 (23:46 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Sun, 2 Nov 2014 23:46:51 +0000 (23:46 +0000)
commit2220408e1a357b127aa915bff67ba7350cafd5c0
tree0f5346935a0447b50905208087399452b7d69726tree | snapshot
parent1ac6c458c85d76a05638761eaf401a2340e71f12commit | diff
Support REG_SEQUENCE in tablegen.

The problem is mostly that variadic output instruction
aren't handled, so it is rejected for having an inconsistent
number of operands, and then the right number of operands
isn't emitted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221117 91177308-0d34-0410-b5e6-96231b3b80d8
include/llvm/Target/Target.td diff | blob | history
lib/Target/R600/SIInstructions.td diff | blob | history
utils/TableGen/CodeGenDAGPatterns.cpp diff | blob | history
utils/TableGen/DAGISelMatcherGen.cpp diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors