[regalloc] Make RegMask clobbers prevent merging vreg's into PhysRegs when hoisting...
authorDaniel Sanders <daniel.sanders@imgtec.com>
Fri, 31 Jul 2015 12:58:55 +0000 (12:58 +0000)
committerDaniel Sanders <daniel.sanders@imgtec.com>
Fri, 31 Jul 2015 12:58:55 +0000 (12:58 +0000)
commit289b5e7f39c04256777ade0a896225349958de7d
tree358be14ce0fff122ffe4729e3571987f1418ffe0
parentc71235ab7d7e028a88c1cf9cc70323cd955cd27f
[regalloc] Make RegMask clobbers prevent merging vreg's into PhysRegs when hoisting def's upwards.

Summary:
This prevents vreg260 and D7 from being merged in:
  %vreg260<def> = LDC1 ...
  JAL <ga:@sin>, <regmask ... list not containing D7 ...>
  %D7<def> = COPY %vreg260; ...
Doing so is not valid because the JAL clobbers the D7.

This fixes the almabench regression in the LLVM 3.7.0 release branch.

Reviewers: MatzeB

Subscribers: MatzeB, qcolombet, hans, llvm-commits

Differential Revision: http://reviews.llvm.org/D11649

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243745 91177308-0d34-0410-b5e6-96231b3b80d8
lib/CodeGen/RegisterCoalescer.cpp