ASoC: rsnd: merge SRC clock timing/setting
authorKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Fri, 24 Jan 2014 02:41:10 +0000 (18:41 -0800)
committerMark Brown <broonie@linaro.org>
Mon, 3 Feb 2014 12:41:37 +0000 (12:41 +0000)
commit28dc4b63cdb96f2448a677320fcc0eb112e13e3f
tree3cf5e71537e640c426db51206a9864bc0f875279
parent96c7c0d6f8c6e09e9123f0518130c047c5de40f6
ASoC: rsnd: merge SRC clock timing/setting

SRC clock and timing setting register
exist in SRU and ADG on Gen1.
But, these are merged into ADG on Gen2.
Current driver is supporting Gen1 SRC only
at this point, but, above settings are
set as different function.
This patch merges these as preparation of Gen2 support.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
sound/soc/sh/rcar/adg.c
sound/soc/sh/rcar/rsnd.h
sound/soc/sh/rcar/scu.c