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(parent: 230c473) | patch
MachineRegisterInfo: Remove UsedPhysReg infrastructure
authorMatthias Braun <matze@braunis.de>
Tue, 14 Jul 2015 17:52:07 +0000 (17:52 +0000)
committerMatthias Braun <matze@braunis.de>
Tue, 14 Jul 2015 17:52:07 +0000 (17:52 +0000)
commit2addf067a2165bc5e870c9dbc190447f78f79b51
treec9731451d373b1188df7814cf9dfc0fa670ce42dtree | snapshot
parent230c4739b30067b4c6ac082fb5b01f1e4634f751commit | diff
MachineRegisterInfo: Remove UsedPhysReg infrastructure

We have a detailed def/use lists for every physical register in
MachineRegisterInfo anyway, so there is little use in maintaining an
additional bitset of which ones are used.

Removing it frees us from extra book keeping. This simplifies
VirtRegMap.

Differential Revision: http://reviews.llvm.org/D10911

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242173 91177308-0d34-0410-b5e6-96231b3b80d8
18 files changed:
include/llvm/CodeGen/LiveRegMatrix.h diff | blob | history
include/llvm/CodeGen/MachineRegisterInfo.h diff | blob | history
lib/CodeGen/ExecutionDepsFix.cpp diff | blob | history
lib/CodeGen/LiveRegMatrix.cpp diff | blob | history
lib/CodeGen/MachineRegisterInfo.cpp diff | blob | history
lib/CodeGen/PrologEpilogInserter.cpp diff | blob | history
lib/CodeGen/RegAllocFast.cpp diff | blob | history
lib/CodeGen/VirtRegMap.cpp diff | blob | history
lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp diff | blob | history
lib/Target/AArch64/AArch64FrameLowering.cpp diff | blob | history
lib/Target/AMDGPU/SIMachineFunctionInfo.cpp diff | blob | history
lib/Target/AMDGPU/SIPrepareScratchRegs.cpp diff | blob | history
lib/Target/AMDGPU/SIRegisterInfo.cpp diff | blob | history
lib/Target/Hexagon/HexagonFrameLowering.cpp diff | blob | history
lib/Target/PowerPC/PPCFrameLowering.cpp diff | blob | history
lib/Target/Sparc/SparcFrameLowering.cpp diff | blob | history
lib/Target/X86/X86FloatingPoint.cpp diff | blob | history
lib/Target/X86/X86FrameLowering.cpp diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors