drm/i915: Limit FIFO underrun reports on GMCH platforms
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 17 Jan 2014 09:44:31 +0000 (11:44 +0200)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Sat, 25 Jan 2014 20:13:37 +0000 (21:13 +0100)
commit2d9d2b0b438e46f0b2bf3c3379a5338ffa909027
treee3d0abaa9d2a476655841527922881b87f69dc08
parent20f0ec16ca5c51accdb9a7631411b39aa6b4256e
drm/i915: Limit FIFO underrun reports on GMCH platforms

Currently we print all pipe underruns on GMCH platforms. Hook up the
same logic we use on PCH platforms where we disable the underrun
reporting after the first underrun.

Underruns don't actually generate interrupts themselves on GMCH
platforms, we just can detect them whenever we service other
interrupts. So we don't have any enable bits to worry about. We just
need to remember to clear the underrun status when enabling underrun
reporting.

Note that the underrun handling needs to be moved to the non-locked
pipe_stats[] loop in the interrupt handlers to avoid having to rework
the locking in intel_set_cpu_fifo_underrun_reporting().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_irq.c
drivers/gpu/drm/i915/intel_display.c