[ARM] tegra: stingray: Fix CPU DVFS

[ARM] tegra: stingray: Fix CPU DVFS

P0 and later models were changed to put the cpu_vdd regulator
in MODE 1, rather than the previous MODE 3 value. This caused
DVFS to appear to work but actually have no impact on the
cpu voltage.

In addition, when resuming from LP0, the CPU voltage must be
1.0v.  To guarantee this, the voltage needs to be set upon
entering suspend, so when the regulator is re-enabled, it is
the correct voltage before code begins executing.

Change-Id: I3580c832dbb4b5ce9ce7bd0089352a72b3b3869c
Signed-off-by: Greg Meiste <w30289@motorola.com>