clk: samsung: exynos5433: Add clocks for CMU_AUD domain
authorChanwoo Choi <cw00.choi@samsung.com>
Mon, 2 Feb 2015 14:24:03 +0000 (23:24 +0900)
committerSylwester Nawrocki <s.nawrocki@samsung.com>
Wed, 4 Feb 2015 17:58:13 +0000 (18:58 +0100)
commit2e997c035945784fb8c564305c0f0ddacc374fe4
treea015ff58443152d2da80d50da2a3f09f8339964e
parent2a1808a6c00fb6d75ebfa596add57638b9290926
clk: samsung: exynos5433: Add clocks for CMU_AUD domain

This patch adds the mux/divider/gate clocks for CMU_AUD domain which
includes the clocks of Cortex-A5/Bus/Audio clocks.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
drivers/clk/samsung/clk-exynos5433.c
include/dt-bindings/clock/exynos5433.h