[FastISel][AArch64] Teach the address computation code to also fold sign-/zero-extends.

[FastISel][AArch64] Teach the address computation code to also fold sign-/zero-extends.

The code already folds sign-/zero-extends, but only if they are arguments to
mul and shift instructions. This extends the code to also fold them when they
are direct inputs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219187 91177308-0d34-0410-b5e6-96231b3b80d8