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[NVPTX] Make sure we zero out high-order 24 bits for 8-bit load into 32-bit value
authorJustin Holewinski <jholewinski@nvidia.com>
Mon, 1 Jul 2013 12:58:48 +0000 (12:58 +0000)
committerJustin Holewinski <jholewinski@nvidia.com>
Mon, 1 Jul 2013 12:58:48 +0000 (12:58 +0000)
commit30b13ebd0b3d29d5f2d3dcbccee31d3a55917277
treec29e9054d4f541376896d4bc5d1fc19857660600tree | snapshot
parentd212db0cac7a7d0d58ba09369808a408fa8da5c1commit | diff
[NVPTX] Make sure we zero out high-order 24 bits for 8-bit load into 32-bit value

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185328 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/NVPTX/NVPTXISelLowering.cpp diff | blob | history
test/CodeGen/NVPTX/ldu-i8.ll [new file with mode: 0644] blob
C/C++ LLVM-based compilers that forbids OOTA behaviors