UPSTREAM: arm: dts: rockchip: add reset node for the exist saradc SoCs
SARADC controller needs to be reset before programming it, otherwise
it will not function properly.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
Change-Id: Iaafd41b163ebd853278baea5c1c10dc82c54792b
(cherry picked from commit
3d4267a5a3a4b7619b80ad1839d8b3bedd8b7a8d)
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>