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(parent: 80a4c65) | patch
[ARM] tegra: fix packet alignment and padding
authorGary King <gking@nvidia.com>
Wed, 28 Jul 2010 22:03:57 +0000 (15:03 -0700)
committerColin Cross <ccross@android.com>
Wed, 6 Oct 2010 23:27:23 +0000 (16:27 -0700)
commit367c3aab790c8a407bb1f97c5f922b69289df89b
tree10e340ebb4ffaf4773ec9b4e9277c392acd08f6ctree | snapshot
parent80a4c65c42369016e41272279aec8944f22b88edcommit | diff
[ARM] tegra: fix packet alignment and padding

tegra's DMA controller expects to start transfers at word boundaries,
and the standard packet alignment (2) was resulting in data corruption

also, provide a full cacheline of padding between skbuffs, to eliminate
coherency issues between the processor and USB networking devices.

Change-Id: Ibb508b512f43c8934d35eb182c8738370b7be585
Signed-off-by: Gary King <gking@nvidia.com>
arch/arm/mach-tegra/include/mach/memory.h diff | blob | history
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