SDMMC:
authorxbw <xbw@rock-chips.com>
Mon, 5 May 2014 02:10:32 +0000 (10:10 +0800)
committerxbw <xbw@rock-chips.com>
Mon, 5 May 2014 02:10:32 +0000 (10:10 +0800)
commit36ae021903cb306454c03d36f9298a1b1bb5c257
treea2bcfa724d9fe6c4a2294156164cb34b29917e9d
parent6e2deb958a0e5ea846c532de6dcddd5f7ecdec7e
SDMMC:
1、set the emmc-clock to 150Mhz which compatible with new PLL.
2. Optimization timing Training.
3. SD3.0/SDIO3.0 implementation process.
arch/arm/boot/dts/rk3288.dtsi
drivers/mmc/host/dw_mmc-rockchip.c
drivers/mmc/host/rk_sdmmc.c
drivers/mmc/host/rk_sdmmc.h
drivers/mmc/host/rk_sdmmc_of.c
drivers/mmc/host/rk_sdmmc_of.h
include/linux/mmc/rk_mmc.h