Special case tblgen generated code for patterns like (and X, 255) or (or X, 42).

Special case tblgen generated code for patterns like (and X, 255) or (or X, 42).
The dag/inst combiners often 'simplify' the masked value based on whether
or not the bits are live or known zero/one.  This is good and dandy, but
often causes special case patterns to fail, such as alpha's CMPBGE pattern,
which looks like "(set GPRC:$RC, (setuge (and GPRC:$RA, 255), (and GPRC:$RB, 255)))".
Here the pattern for (and X, 255) should match actual dags like (and X, 254) if
the dag combiner proved that the missing bits are already zero (one for 'or').

For CodeGen/Alpha/cmpbge.ll:test2 for example, this results in:

        sll $16,1,$0
        cmpbge $0,$17,$0
        ret $31,($26),1

instead of:

        sll $16,1,$0
        and $0,254,$0
        and $17,255,$1
        cmpule $1,$0,$0
        ret $31,($26),1

... and requires no target-specific code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30871 91177308-0d34-0410-b5e6-96231b3b80d8