UPSTREAM: ARM: rockchip: add support smp for rk3036
authorHeiko Stuebner <heiko@sntech.de>
Wed, 4 Nov 2015 12:25:16 +0000 (20:25 +0800)
committerCaesar Wang <wxt@rock-chips.com>
Tue, 31 May 2016 08:43:16 +0000 (16:43 +0800)
commit3a60718b34570d90e39b8a465a5a700355b71b0f
tree03cd8a9198fa31fb89c59633d49cb60af9df9c5c
parent6937f6e5e7699b8b86e425eee3558b66460fda4e
UPSTREAM: ARM: rockchip: add support smp for rk3036

The dual-core Cortex A7 rk3036 is a bit special in that it does not allow
to control the actual powerdomain of the cpu cores, while the rest of the
smp-bringup like reset control and entry address handling stays the same.
Its bigger sibling, the quad-core rk3128 again allows powerdomain control.

So allow that case by introducing a separate smp-enable-method, that simply
disables powerdomain handling in the common code.

Change-Id: Ic076a585678e4c8439a6e74cd92e1a983f87f76b
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Xing Zheng <zhengxing@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from git.kernel.org next/linux-next.git master
 commit 9def7ccfe8d5b84d382cff83553dd6db72f61a23)
Documentation/devicetree/bindings/arm/cpus.txt
arch/arm/mach-rockchip/platsmp.c