[ARM] tegra: add CPU_IDLE driver

[ARM] tegra: add CPU_IDLE driver

supports clock-gated (LP3) SMP idle mode, and power-gated (LP2) idle
mode when all slave processors are off-line

latency for LP2 idle state is calculated as a 2-sample weighted moving
average, to allow for future variations due to (e.g.) CPU frequency
scaling.

when LP2 is an allowed state (i.e., slave CPUs have been taken off-line),
LP3 will perform an hrtimer peek-ahead; this avoids waiting for the
first processor tick following an LP2 in order to run expired hrtimers
(which was causing a 1 tick delay for most user-space sleeps)

LP2 wakeup time and latency uses a 2ms hard-coded offset to account for
the CPU powergood timeout; this is reasonable for Harmony but should be
un-hardcoded for other platforms.

Change-Id: I75e36dc14341200ba85da7ef2db8a59cc487ecec
Signed-off-by: Gary King <gking@nvidia.com>
Signed-off-by: Colin Cross <ccross@android.com>